Results 261 to 270 of about 4,810,089 (329)

LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019
The increasing complexity of modern Integrated Circuits (ICs) leads to systems composed of various different Intellectual Property (IPs) blocks, known as System-on-Chip (SoC).
Walter Lau Neto, Max Austin, Scott Temple, L. Amarù, Xifan Tang, P. Gaillardon   +5 more
semanticscholar   +1 more source

Reversible Logic Synthesis

Reversible and DNA Computing, 2020
Reversible logic is an emerging research area. Interest in reversible logic is sparked by its necessity in quantum technologies. Reversible implementations are also found in optical technology, nanotechnology, thermodynamics and adiabatic CMOS.
G. Dueck, D. Maslov
semanticscholar   +1 more source

LSTP: A Logic Synthesis Timing Predictor

Asia and South Pacific Design Automation Conference
The ever-growing complexity of modern VLSI circuits brings about a substantial increase in the design cycle. As for logic synthesis, how to efficiently obtain physical characteristics of a design for subsequent design space exploration emerges as a ...
Haisheng Zheng, Zhuolun He, Fangzhou Liu, Zehua Pei, Bei Yu   +4 more
semanticscholar   +1 more source

LUT-Based Hierarchical Reversible Logic Synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019
We present a synthesis framework to map logic networks into quantum circuits for quantum computing. The synthesis framework is based on lookup-table (LUT) networks, which play a key role in conventional logic synthesis.
Mathias Soeken, M. Roetteler, N. Wiebe, G. Micheli   +3 more
semanticscholar   +1 more source

Logic synthesis for programmable logic devices

Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2002
The use of communication complexity based logic synthesis when configuring programmable logic devices (PLDs) is discussed. Configuration of a PLD involves the two processes of logic synthesis and logic embedding. Since the allowable PLD logic primitives usually include a very large number of gates, the processes of logic synthesis and technology ...
T.-T. Hwang, R.M. Owens, M.J. Irwin
openaire   +1 more source

Logic transformations for synchronous logic synthesis

Twenty-Third Annual Hawaii International Conference on System Sciences, 2002
An approach to logic synthesis of digital synchronous sequential circuits is presented. Algorithms are described for minimizing the area of synchronous combinational and/or sequential circuits under cycle time constraints and for minimizing the cycle time under area constraints.
G. De Micheli, R. Yip
openaire   +1 more source

Dynamic logic synthesis

Proceedings of CICC 97 - Custom Integrated Circuits Conference, 2002
A self-timed dynamic logic family, clock-delayed (CD) domino, was developed to provide non-dual-rail gates with inverting or non-inverting outputs. CD domino circuits are as easy to synthesize as static circuits and synthesis tools developed for static CMOS are used as part of a methodology for automating the design and synthesis of dynamic circuits ...
null Gin Yee, C. Sechen
openaire   +1 more source

Effective Logic Synthesis for Threshold Logic Circuit Design

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019
This paper presents a novel and effective logic synthesis flow able to identify threshold logic functions during the technology mapping process. It provides more efficient logic covering, exploring also redundant cuts.
Augusto Neutzling, J. Matos, A. Mishchenko, A. Reis, R. Ribas   +4 more
semanticscholar   +1 more source

A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits

ACM Great Lakes Symposium on VLSI, 2019
Adiabatic Quantum-Flux-Parametron (AQFP) logic is an adiabatic superconductor logic that has been proposed as alternative to CMOS logic with extremely high energy efficiency. In AQFP technology, majority-based gates have the same area as two-input AND/OR
R. Cai, O. Chen, Ao Ren, Ning Liu, Caiwen Ding, N. Yoshikawa, Yanzhi Wang   +6 more
semanticscholar   +1 more source

Logic Synthesis for RRAM-Based In-Memory Computing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
Design of nonvolatile in-memory computing devices has attracted high attention to resistive random access memories (RRAMs). We present a comprehensive approach for the synthesis of resistive in-memory computing circuits using binary decision diagrams ...
S. Shirinzadeh, Mathias Soeken, P. Gaillardon, R. Drechsler   +3 more
semanticscholar   +1 more source