Results 231 to 240 of about 136,493 (299)

Design and simulation of a p-type dual interbridge treeFET with comprehensive DC, analog/RF, and linearity analysis for CMOS circuit applications. [PDF]

Sci Rep
Mounika S, Nanda U.
europepmc   +1 more source

Total Ionizing Dose Effect Simulation Study on 130 nm CMOS Processor. [PDF]

Micromachines (Basel)
Liu Y, Liu Y, Liao X, Xu C, He Y, Yang Y.   +5 more
europepmc   +1 more source

A full-featured 2D flash chip enabled by system integration. [PDF]

Nature
Liu C, Jiang Y, Shen B, Yuan S, Cao Z, Bi Z, Wang C, Xiang Y, Wang T, Wu H, Liu Z, Wang Y, Wang S, Zhou P.   +13 more
europepmc   +1 more source

A Low-Noise Hybrid-Integrated Balanced Homodyne Receiver with 2.5 GHz Bandwidth and 15 dB Quantum Shot Noise Clearance. [PDF]

Micromachines (Basel)
Yang Y, Cheng C, Yang R, Ren Y, Bao S, Xue J, Lai H, Wang B.   +7 more
europepmc   +1 more source

Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression. [PDF]

Nanophotonics
Choi JW, Ong KYK, Kato M, Chee GYN, Eggleton BJ, Nagarajan R, Tan DTH.   +6 more
europepmc   +1 more source

Robust and compact reversible logic gate for low-power and high-performance computing. [PDF]

Sci Rep
Rajput A, Kumawat R, Srinivasulu A, Sharma J.   +3 more
europepmc   +1 more source

A low-power CMOS Bluetooth transceiver

, 2003
openaire   +2 more sources