Results 31 to 40 of about 136,493 (299)
Design of a CMOS Low Power Voltage Controlled Oscillator
Chemical Engineering Transactions, 2017 In the millimeter wave wireless communication system, frequency source is an indispensable device in the communication equipment. It is designed to provide a local oscillator signal for the receiving and transmitting system. Its tuning range, phase noise
Fucui Huo
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Design of A Low Power Low Voltage CMOS Opamp
, 2010 In this paper a CMOS operational amplifier is presented which operates at 2V power supply and 1microA input bias current at 0.8 micron technology using non conventional mode of operation of MOS transistors and whose input is depended on bias current. The
Baruah, Ratul Kr.
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High performances monolithic CMOS detectors for space applications [PDF]
, 2001 During the last 10 years, research about CMOS image sensors (also called APS -Active Pixel Sensors) has been intensively carried out, in order to offer an alternative to CCDs as image sensors.
Corbière, Franck +8 more
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Low-power CMOS current conveyor
Electronics Letters, 2000 A novel second-generation CMOS current conveyor based on a new adaptive biasing technique is proposed. It is shown that the use of this circuit offers an excellent performance and leads to a significant reduction in the standby power dissipation. PSPICE simulation results, assuming 0.5 /spl mu/m CMOS process, are also given.
A.M. Ismail, A.M. Soliman
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A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects [PDF]
, 2007 Interconnect architectures which leverage high-bandwidth optical channels offer a promising solution to address the increasing chip-to-chip I/O bandwidth demands.
Emami-Neyestanak, Azita +2 more
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In Situ Study of Resistive Switching in a Nitride‐Based Memristive Device
Advanced Functional Materials, EarlyView.In situ TEM biasing experiment demonstrates the volatile I‐V characteristic of MIM lamella device. In situ STEM‐EELS Ti L2/L3 ratio maps provide direct evidence of the oxygen vacancies migrations under positive/negative electrical bias, which is critical for revealing the RS mechanism for the MIM lamella device.
Di Zhang +19 more
wiley +1 more source
Low power‐delay‐product dynamic CMOS circuit design techniques
Electronics Letters, 2017 Two low power‐delay‐product (PDP) dynamic CMOS circuit design techniques are proposed. The techniques can simply modify existing dynamic CMOS designs to improve dynamic circuit delay and PDP.
H. Xue, S. Ren
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Analysis of the subthreshold CMOS logic inverter
Ain Shams Engineering Journal, 2018 There is no doubt that operating the MOSFET transistor in the subthreshold region, where the power-supply voltage is less than the threshold voltage, has an increasing importance due to the reduced power consumption.
Sherif M. Sharroush
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Low-Power Register File Design in 90nm CMOS Technology [PDF]
مجله مدل سازی در مهندسی, 2018 The main portion of the power consumption in high speed register files is related to read out paths which are implemented using the dynamic circuits.
Mohammad Asyaei
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Optimizing CMOS circuits for low power using transistor reordering [PDF]
, 1996 This paper addresses the optimization of a circuit for low power using transistor reordering. The optimization algorithm relies on a stochastic model of a static CMOS gate that includes the power internal nodes of the gate. This power consumption depends
Cortadella, Jordi, Musoll Cinca, Enric
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