Results 251 to 260 of about 318,553 (304)

Multiple-valued logic

IEEE Potentials, 1995
The ultimate usefulness of a number system depends on its implementation. Multiple-valued logic has been implemented in charge-coupled devices (CCD). In this technology, logic values are encoded as charge. For example, prototype four-valued logic devices have been implemented at the University of Twente (Enschede, Holland). Hitachi has implemented a 16-
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Multiple-valued logic in FPGAs

Proceedings of 36th Midwest Symposium on Circuits and Systems, 2002
This paper considers the applicability of multiple-valued logic (MVL) circuits in implementation of field-programmable gate arrays (FPGAs). It proposes an FPGA logic block architecture that features MVL current-mode CMOS circuitry. The logic block combines the lookup-table and multiplexer approaches found in commercial FPGAs, and provides additional ...
Z. Zilic, Z.G. Vranesic
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Multiple-Valued Logic: An Implementation

Optical Engineering, 1986
The state of the art for multiple-valued electronic devices relying on integrated injection logic (I2L) is discussed. Applications and extension of multiple-valued I2L devices to quaternary logic technology are presented.
T. T. Dao, D. M. Campbell
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Multiple-Valued Logic Minimization

1984
As discussed in Chapter 1, many multiple-valued input logic functions can be implemented very efficiently in PLA’s with two-bit input decoders. Hence multiple-valued logic minimization is of great practical importance [FLE 75]. A two-bit decoder pairs two Boolean variables, say x1 and x2, and generates four decodes $$ \begin{array}{*{20}{c}} {{{x}_{
Robert K. Brayton, Gary D. Hachtel, Curtis T. McMullen, Alberto L. Sangiovanni-Vincentelli   +3 more
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Uncertainty, Energy, and Multiple-Valued Logics

IEEE Transactions on Computers, 1986
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
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PLI logic for multiple-valued functions

IEE Proceedings - Computers and Digital Techniques, 2001
Properties of transformation matrices for multiple-valued-input binary-output PLI logic are discussed. It is shown that some of PLI logic transformations for Boolean functions are still applicable for multiple-valued-input binary functions with appropriate coding and new matrix functions.
B.J. Falkowski, S. Rahardja
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Multiple-Valued Logic Charge-Coupled Devices

IEEE Transactions on Computers, 1981
A new method to implement multiple-valued logic in large scale integrated circuits is introduced. The data are represented by discrete amounts of charge in a charge-coupled device. In this paper the design principles and realizations in four-valued logic of a minimum and maximum circuit, a complement circuit, a literal a successor, and an adder are ...
null Kerkhoff, null Tervoert
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Multiple-Valued Logic For Optoelectronics

Optical Engineering, 1986
Recent advances in optical bistability in a variety of materials and devices offer the potential for high speed operation over extended ranges of wavelength and temperature. The advantages of optoelec-tronic devices and multiple-valued logic are combined in various multistable solid-state device techniques, of which negative resistance multistability ...
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Multiple-valued logic memory circuit

International Journal of Electronics, 1995
A new voltage-mode CMOS multiple-valued logic (MVL) memory circuit has been realized in a standard 2 μm p-well polysilicon-gate CMOS technology. This circuit requantizes MVL voltages during a setup clock mode and latches the input value during the hold clock mode. Using a 5 V supply and logical voltage increments of 1 -67 V, a quaternary memory circuit
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Algorithmic logic. Multiple-valued extensions

Studia Logica, 1979
Extended algorithmic logic (EAL) as introduced in [18] is a modified version of extended ω+-valued algorithmic logic. Only two-valued predicates and two-valued propositional variables occur in EAL. The role of the ω+-valued logic is restricted to construct control systems (stacks) of pushdown algorithms whereas their actions are described by means of ...
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