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Noise Margin Calculation in Multiple-Valued Logic

International Conference on Computer and Knowledge Engineering, 2020
Noise margin (NM) is an important concept in circuit design since noise is one of the major challenges for reliability. This subject is very critical in multiple-valued logic (MVL), where the entire voltage range is divided into several narrow zones ...
Mehdi Takbiri, K. Navi, R. F. Mirzaee
semanticscholar   +1 more source

A Logic of Multiple-Valued Argumentation

International Joint Conference on Autonomous Agents and Multiagent Systems, 2004
This paper provides a new departure from the traditional two-valued argumentation frameworks. We address ourselves to formalize an expressive logic of argumentation, called a Logic of Multiple-valued Argumentation (LMA), on top of the very expressive knowledge representation language, called Extended Annotated Logic Programming (EALP), and examine its ...
Takehisa Takahashi, Hajime Sawamura
openaire   +2 more sources

Efficient Passive Shielding of MWCNT Interconnects to Reduce Crosstalk Effects in Multiple-Valued Logic Circuits

IEEE transactions on electromagnetic compatibility (Print), 2019
In this paper, the effectiveness of passive shielding of multiwalled carbon nanotube (MWCNT) bundle interconnects in reducing the crosstalk effects in carbon nanotube FET based ternary circuits is comprehensively investigated.
M. H. Moaiyeri   +3 more
semanticscholar   +1 more source

Multiple-valued logic design using multiple-valued EXOR

Proceedings 25th International Symposium on Multiple-Valued Logic, 2002
An approach to logic minimization using a new sum operation called multiple valued EXOR is proposed. The paper introduces the multiple valued sum of products expression using the EXOR. As the scheme of the minimization, we utilize an idea based on neural computing.
Takahiro Hozumi   +3 more
openaire   +1 more source

Multiple-valued logic as a programming language

Proceedings 1997 27th International Symposium on Multiple- Valued Logic, 2002
A method for specifying the computable functions using multiple-valued logics is described. The logics in question provide a uniform environment both for specifying computable functions on the natural numbers and for proving theorems about such specifications.
Robert J. Bignall, Matthew Spinks
openaire   +1 more source

A design of multiple-valued logic neuron

Proceedings of the Twentieth International Symposium on Multiple-Valued Logic, 2002
A design for a multiple-valued-logic (MVL) neuron model, in which MVL operations are used to produce analog responses to be fed to a quantizer, is presented. The proposed MVL neuron model can be trained to classify the input pattern vectors according to the special inputs called 'desired responses'.
Tatsuki Watanabe   +3 more
openaire   +1 more source

BC-MVLiM: A Binary-Compatible Multi-Valued Logic-in-Memory Based on Memristive Crossbars

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2023
Logic-in-memory with memristive crossbars is an attractive approach for realizing beyond von Neumann architectures. Multi-valued logic (MVL) containing more than two logic levels can enhance the computing speed with reduced number of logic operations. In
Yanan Sun   +5 more
semanticscholar   +1 more source

Optoelectronic multiple-valued logic implementation

Optics Letters, 1989
A design for optoelectronic multiple-value logic circuits that uses bistable laser diodes or light-emitting diodes is reported. In this multiple-valued logic design, an optoelectronic tristable switching circuit, or light-current mirror, in which two bistable light-emitting diodes are connected in parallel serves as the basic logic element.
S, Liu, C, Li, J, Wu, Y, Liu
openaire   +2 more sources

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