Results 291 to 300 of about 817,699 (342)

A Minimization Technique for Multiple-Valued Logic Systems

IEEE Transactions on Computers, 1968
Angegeben wird ein funktionell vollständiger \(m\)-wertiger Aussagenkalkül mit den Werten \((0,1,2,\dots,m-1)\), der neben den Konstanten, der Alternative and der Konjunktion einstellige Funktionen \(\overset {a,b} {x}\) enthält, die bei einer Belegung \(f\) der Variablen \(x\) den Wert \((m-1)\) liefern genau dann, wenn \(a\leq f(x)\leq b\) ist, and ...
Charles M. Allen, Donald D. Givone
exaly   +3 more sources

Multiple-valued logic design tools

[1993] Proceedings of the Twenty-Third International Symposium on Multiple-Valued Logic, 2002
A brief overview of past progress in multiple-valued logic design is presented. The methods are considered with respect to the likely development of multiple-valued field programmable gate arrays. Look-up table based arrays are considered in some detail and an algorithm for mapping multiple-valued functions to such an array is presented. This algorithm
openaire   +1 more source

Multiple valued logic for microprocessors

Euromicro Newsletter, 1980
Abstract Pin limitation has always been an important problem of Integrated Circuits Packages. In this paper, we examine multiple valued logic as an alternative approach to time multiplexing. TTL and CMOS 4-2 and 2–4 interface circuits are presented and it is shown that 4-valued address, data and coded control lines would solve most of pin limitation ...
D. Etiemble, J.P. Aillaud
openaire   +1 more source

Multiple-Valued Logic: An Introduction and Overview

IEEE Transactions on Computers, 1977
MULTIPLE-VALUED logic has been a subject of research work for many years [1], [2]. Until the late 1960's most of the reported work was of a theoretical nature, leaving little impact on the firmly established binary approaches in the design of digital systems.
openaire   +1 more source

A non-commutative multiple-valued logic

[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic, 2002
A set of operations which can be used to design n-valued switching functions is given. These give rise to a class of algebras which are left-handed skew lattices together with dual implication operation. Such algebras form a decidable discriminator variety, and hence possess a well-behaved structure theory and satisfy many identities.
openaire   +1 more source

Multiple-valued logic in FPGAs

Proceedings of 36th Midwest Symposium on Circuits and Systems, 2002
This paper considers the applicability of multiple-valued logic (MVL) circuits in implementation of field-programmable gate arrays (FPGAs). It proposes an FPGA logic block architecture that features MVL current-mode CMOS circuitry. The logic block combines the lookup-table and multiplexer approaches found in commercial FPGAs, and provides additional ...
Z. Zilic, Z.G. Vranesic
openaire   +1 more source

Multiple-Valued Logic and Neural Network in the Position-Based Cryptography Scheme

Journal of Russian Laser Research, 2021
A. Bykovsky
semanticscholar   +1 more source

Introduction—Multiple-Valued Logic

IEEE Transactions on Computers, 1986
MULTIPLE-valued logic has been the object of much research over the last fifteen years. Since 1971, there has been an annual symposium devoted exclusively to the subject and, during that time, nearly 600 papers have appeared in its Proceedings. In addition, a large number of technical papers have appeared elsewhere together with a number of survey ...
null Muzio, null Rosenerg
openaire   +1 more source

Conquering Uncertainty in Multiple-Valued Logic Design

Artificial Intelligence Review, 2003
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
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Multiple-Valued Logic: An Implementation

Optical Engineering, 1986
The state of the art for multiple-valued electronic devices relying on integrated injection logic (I2L) is discussed. Applications and extension of multiple-valued I2L devices to quaternary logic technology are presented.
T. T. Dao, D. M. Campbell
openaire   +1 more source