Dielectric Engineering to Suppress Cell-to-Cell Programming Voltage Interference in 3D NAND Flash Memory [PDF]
Micromachines, 2021 In contrast to conventional 2-dimensional (2D) NAND flash memory, in 3D NAND flash memory, cell-to-cell interference stemming from parasitic capacitance between the word-lines (WLs) is difficult to control because the number of WLs, achieved for better ...
Woo-Jin Jung, Jun-Young Park
doaj +4 more sources
Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices [PDF]
Computers, 2017 We review the state-of-the-art in the understanding of planar NAND Flash memory reliability and discuss how the recent move to three-dimensional (3D) devices has affected this field.
Alessandro S. Spinelli +2 more
doaj +4 more sources
Utilization of Unsigned Inputs for NAND Flash-Based Parallel and High-Density Synaptic Architecture in Binary Neural Networks [PDF]
IEEE Journal of the Electron Devices Society, 2021 A novel design method using unsigned input is proposed for a high-density and parallel synaptic string architecture capable of bit-wise operation and bit-counting utilizing NAND flash memory.
Sung-Tae Lee +6 more
doaj +2 more sources
Artificial Neural Network Assisted Error Correction for MLC NAND Flash Memory [PDF]
Micromachines, 2021 The multilevel per cell technology and continued scaling down process technology significantly improves the storage density of NAND flash memory but also brings about a challenge in that data reliability degrades due to the serious noise.
Ruiquan He +3 more
doaj +2 more sources
Channel Modeling and Quantization Design for 3D NAND Flash Memory [PDF]
Entropy, 2023 As the technology scales down, two-dimensional (2D) NAND flash memory has reached its bottleneck. Three-dimensional (3D) NAND flash memory was proposed to further increase the storage capacity by vertically stacking multiple layers.
Cheng Wang +5 more
doaj +2 more sources
Experimental Investigation of Threshold Voltage Temperature Effect During Cross-Temperature Write–Read Operations in 3-D NAND Flash [PDF]
IEEE Journal of the Electron Devices Society, 2021 Reading data at a temperature which different from writing can cause a large number of failed bits in 3D NAND Flash memory. In this work, the threshold voltage (Vth) temperature effect of 3D NAND flash memory cell was investigated and a method was ...
Dan Wu +4 more
doaj +2 more sources
Modeling methodology for thermo-structural analysis of V-NAND flash memory structure [PDF]
Scientific ReportsThis study proposes modeling methodology based on a continuous model for conducting thermo-electric-structural analyses of V-NAND flash memory structure under the Joule heating effect.
Yongha Kim, Seungjun Ryu, Sungryung Lee
doaj +2 more sources
Random Telegraph Noise in 3D NAND Flash Memories. [PDF]
Micromachines (Basel), 2021 In this paper, we review the phenomenology of random telegraph noise (RTN) in 3D NAND Flash arrays. The main features of such arrays resulting from their mainstream integration scheme are first discussed, pointing out the relevant role played by the polycrystalline nature of the string silicon channels on current transport.
Spinelli AS +3 more
europepmc +5 more sources
An SVM-Based NAND Flash Endurance Prediction Method [PDF]
Micromachines, 2021 NAND flash memory is widely used in communications, commercial servers, and cloud storage devices with a series of advantages such as high density, low cost, high speed, anti-magnetic, and anti-vibration.
Haichun Zhang +5 more
doaj +2 more sources
Temperature Impacts on Endurance and Read Disturbs in Charge-Trap 3D NAND Flash Memories [PDF]
Micromachines, 2021 Temperature effects should be well considered when designing flash-based memory systems, because they are a fundamental factor that affect both the performance and the reliability of NAND flash memories.
Fei Chen +6 more
doaj +2 more sources