3D NAND Flash Memory Based on Double-Layer NC-Si Floating Gate with High Density of Multilevel Storage [PDF]
Nanomaterials, 2022 As a strong candidate for computing in memory, 3D NAND flash memory has attracted great attention due to the high computing efficiency, which outperforms the conventional von-Neumann architecture. To ensure 3D NAND flash memory is truly integrated in the
Xinyue Yu +6 more
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Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices
Computers, 2017 We review the state-of-the-art in the understanding of planar NAND Flash memory reliability and discuss how the recent move to three-dimensional (3D) devices has affected this field.
Christian Monzio Compagnoni +2 more
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Architectural and Integration Options for 3D NAND Flash Memories
Computers, 2017 Nowadays, NAND Flash technology is everywhere, since it is the core of the code and data storage in mobile and embedded applications; moreover, its market share is exploding with Solid-State-Drives (SSDs), which are replacing Hard Disk Drives (HDDs) in ...
Cristian Zambelli +2 more
exaly +3 more sources
Impact of Program–Erase Operation Intervals at Different Temperatures on 3D Charge-Trapping Triple-Level-Cell NAND Flash Memory Reliability [PDF]
MicromachinesThree-dimensional charge-trapping (CT) NAND flash memory has attracted extensive attention owing to its unique merits, including huge storage capacities, large memory densities, and low bit cost.
Xuesong Zheng +6 more
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Bilayer LDPC Codes Combined with Perturbed Decoding for MLC NAND Flash Memory [PDF]
EntropyThis paper presents a coding scheme based on bilayer low-density parity-check (LDPC) codes for multi-level cell (MLC) NAND flash memory. The main feature of the proposed scheme is that it exploits the asymmetric properties of an MLC flash channel and ...
Lingjun Kong +3 more
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Neuromorphic Computing Using NAND Flash Memory Architecture With Pulse Width Modulation Scheme [PDF]
Frontiers in Neuroscience, 2020 A novel operation scheme is proposed for high-density and highly robust neuromorphic computing based on NAND flash memory architecture. Analog input is represented with time-encoded input pulse by pulse width modulation (PWM) circuit, and 4-bit synaptic ...
Sung-Tae Lee, Jong-Ho Lee
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Ising Solver Using Vertical NAND Flash Memory
Advanced Intelligent SystemsCombinatorial optimization problems are notoriously hard for conventional computers to solve efficiently. While quantum and analog hardware have been explored to tackle these problems, they often face challenges such as high power use, complexity, or ...
Sung‐Ho Park +7 more
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Compression-Assisted Adaptive ECC and RAID Scattering for NAND Flash Storage Devices [PDF]
Sensors, 2020 NAND flash memory-based storage devices are vulnerable to errors induced by NAND flash memory cells. Error-correction codes (ECCs) are integrated into the flash memory controller to correct errors in flash memory. However, since ECCs show inherent limits
Seung-Ho Lim, Ki-Woong Park
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Asymmetric Programming: A Highly Reliable Metadata Allocation Strategy for MLC NAND Flash Memory-Based Sensor Systems [PDF]
Sensors, 2014 While the NAND flash memory is widely used as the storage medium in modern sensor systems, the aggressive shrinking of process geometry and an increase in the number of bits stored in each memory cell will inevitably degrade the reliability of NAND flash
Min Huang, Zhaoqing Liu, Liyan Qiao
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Triple-Level Content-Addressable Vertical NAND Flash Memory. [PDF]
Adv Sci (Weinh)Commercial triple‐level‐cell V‐NAND flash memory is transformed into a compact content‐addressable memory by directly exploiting its eight threshold‐voltage states. A parity‐split search scheme preserves storage density while enabling reliable multi‐level and don't‐care matching. Parallel word‐line search delivers up to 24‐fold higher throughput and 54.
Park SH +8 more
europepmc +2 more sources