Results 101 to 110 of about 1,145 (180)

Design of Network-on-Chip-Based Restricted Coulomb Energy Neural Network Accelerator on FPGA Device. [PDF]

Sensors (Basel)
Kang S, Lee S, Jung Y.
europepmc   +1 more source

Dendritic nonlinearities mitigate communication costs. [PDF]

Patterns (N Y)
Wu X, Zhao P, Yu Z, Ma L, Gao Y, Yip KW, Tang H, Pan G, Poirazi P, Huang T.   +9 more
europepmc   +1 more source

Polarity reversal of stable microtubules during neuronal development. [PDF]

J Cell Sci
Iwanski MK, Serweta AK, van Schelt J, Verwei HN, Donders BC, Kapitein LC.   +5 more
europepmc   +1 more source

NoC simulation steered by NEST: McAERsim and a Noxim patch. [PDF]

Front Neurosci
Robens M, Kleijnen R, Schiek M, van Waasen S.   +3 more
europepmc   +1 more source

Networks-on-Chip Interfacing: NoC-based Systems Networking and Inter-NoC Communication [PDF]

International Journal of Computing and Digital Systemss, 2017
openaire   +1 more source

Benchmarking Artificial Neural Network Architectures for High-Performance Spiking Neural Networks. [PDF]

Sensors (Basel)
Islam R, Majurski P, Kwon J, Sharma A, Tummala SRSK.   +4 more
europepmc   +1 more source

Low-latency hierarchical routing of reconfigurable neuromorphic systems. [PDF]

Front Neurosci
Perera S, Xu Y, van Schaik A, Wang R.
europepmc   +1 more source

A Low-Power General Matrix Multiplication Accelerator with Sparse Weight-and-Output Stationary Dataflow. [PDF]

Micromachines (Basel)
Liu P, Wang Y.
europepmc   +1 more source

Spike-based Q-learning in a non-von Neumann architecture. [PDF]

Front Neurosci
Shin D, Jo H, Jang H, Jeong YH, Jeong Y, Kwak JY, Park J, Lee S, Kim I, Park JK, Park S, Jang HJ, Lee HM, Kim J.   +13 more
europepmc   +1 more source

Thermal Side-Channel Threats in Densely Integrated Microarchitectures: A Comprehensive Review for Cyber-Physical System Security. [PDF]

Micromachines (Basel)
Benelhaouare AZ, Mellal I, Saydé M, Nicolescu G, Lakhssassi A.   +4 more
europepmc   +1 more source