Results 41 to 50 of about 124,522 (260)
Worst-Case Communication Time Analysis for On-Chip Networks With Finite Buffers
IEEE Access, 2023 Network-on-Chip (NoC) is the ideal interconnection architecture for many-core systems due to its superior scalability and performance. An NoC must deliver critical messages from a real-time application within specific deadlines.
Rubens Vicente De Liz Bomer +3 more
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FEBS Letters, EarlyView.Proteostasis and the gut microbiota play a key role in shaping host physiology. Microbiota‐derived metabolites, vitamins, and RNA modulate host proteostasis. Findings from model systems, including C. elegans, indicate microbes can either stabilize or disrupt host proteostasis.
Abhishek Anil Dubey, Maria Ermolaeva
wiley +1 more source
Routing Algorithm Based on Double-layer Network on Chip [PDF]
Jisuanji gongcheng, 2016 This paper presents a fast routing algorithm for the new double-layer Network on Chip(NoC) to make full use of the NoC resources.According to the frequency and total volume of the inter-core communications,the proposed algorithm firstly divides them into
FENG Jie,JING Ming’e,YU Zhiyi
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IEEE Access, 2021 The academia and industry have been pursuing network-on-chip (NoC) related research since two decades ago when there was an urgency to respond to the scaling and technological challenges imposed on intra-chip communication in SoC designs.
Weilong Chen +8 more
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FEBS Letters, EarlyView.Cancer progression is regulated by the dynamic matrix code of the tumor microenvironment, which influences cellular behavior and disease development. Importantly, matrix remodeling in three‐dimensional cancer models more accurately reflects in vivo conditions compared to conventional two‐dimensional systems.
Sylvia Mangani +3 more
wiley +1 more source
Energy-aware Application Mapping onto 3D Mesh-Based Network-on-Chip using Heuristic Mapping Algorithms [PDF]
Journal of Universal Computer ScienceNetwork-on-chip (NoC) architectures have emerged as a potential solution for facilitating communication between processing elements (PEs) in modern multi-core systems.
Kiran K A, Jaison Jacob
doaj +3 more sources
Network model of on-chip antennas [PDF]
Advances in Radio Science, 2011 A Network model of an ultra-wide band, intra-chip wireless link is presented. Numerical data of Z-parameters, obtained from full wave simulation of the structure, are used to obtain a rational function representation via the Vector Fitting procedure ...
F. Mukhtar, H. Yordanov, P. Russer
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Microbiome‐blood–brain barrier interactions in aging — mechanisms and therapeutic potential
FEBS Letters, EarlyView.Aging reshapes the gut microbiome (↓SCFA‐producing commensals; ↑pro‐inflammatory outputs), shifting circulating metabolites (↓SCFAs; ↑LPS, ↑TMAO, ↑PAA) that act at the BBB to increase nonspecific transcytosis, alter transport, and promote astrocyte reactivity, heightening brain vulnerability.
Daniel Cuervo‐Zanatta +3 more
wiley +1 more source
Structure‐forward targeting of claudins with synthetic binders
FEBS Letters, EarlyView.Claudins form the paracellular barriers between epithelial and endothelial tissues at tight junctions and are targets for molecular binders with the goal of modulating barrier permeability. Claudin‐binding molecules are relevant in drug delivery or in altering claudin interactions with disease‐causing proteins.
Alex J. Vecchio
wiley +1 more source
Hardware-Software Complex for Network-on-Chip Prototyping Using Multiple FPGAs
IEEE AccessThis paper presents a hardware-software multi-FPGA complex designed for hardware prototyping of networks-on-chip (NoCs). The rationale for the use of multiple FPGAs for NoC prototyping is given.
Mikhail Y. Romashikhin +1 more
doaj +1 more source