Results 71 to 80 of about 457,969 (170)
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures
Heterogeneous 3D System-on-Chips (3D SoCs) are the most promising design paradigm to combine sensing and computing within a single chip. A special characteristic of communication networks in heterogeneous 3D SoCs is the varying latency and throughput in ...
Jan Moritz Joseph +6 more
doaj +1 more source
Leakage-Aware Interconnect for On-Chip Network
On-chip networks have been proposed as the interconnect fabric for future systems-on-chip and multi-processors on chip. Power is one of the main constraints of these systems and interconnect consumes a significant portion of the power budget.
Irwin, Mary Jane +3 more
core +1 more source
A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation
Wireless communication at near-capacity transmission throughputs is facilitated by employing sophisticated Error Correction Codes (ECCs), such as turbo codes.
Ra'ed Al-Dujaily +5 more
doaj +1 more source
Multi-user quantum key distribution with entangled photons from an AlGaAs chip
In view of real world applications of quantum information technologies, the combination of miniature quantum resources with existing fibre networks is a crucial issue.
Autebert, Claire +7 more
core +2 more sources
An Approximate Bufferless Network-on-Chip
Bufferless network-on-chip (NoC) designs have drawn research attention in massively parallel multicore systems via their significant benefits in power and area savings. However, it shows poor throughput and low bandwidth in current bufferless designs due
Ling Wang, Xiaohang Wang, Yadong Wang
doaj +1 more source
Editorial for the Special Issue on Network on Chip (NoC) and Reconfigurable Systems. [PDF]
Zitouni A.
europepmc +1 more source
Interfacing networks-on-chip : harware meeting software [PDF]
Next generation multi-media broadcast standards use encoded high-bandwidth streams of data to efficiently utilize the spectrum, at the cost of computation intensive processing. For battery powered portable devices this is challenging, as the energy source has limited capacity.
openaire +1 more source
Ultra Low Energy FDSOI Asynchronous Reconfiguration Network for Adaptive Circuits
This paper introduces a plug-and-play on-chip asynchronous communication network aimed at the dynamic reconfiguration of a low-power adaptive circuit such as an internet of things (IoT) system.
Soundous Chairat +3 more
doaj +1 more source
Design of an Efficient Interconnection Network of Temperature Sensors [PDF]
Temperature has become a first class design constraint because high temperatures adversely affect circuit reliability, static power and degrade the performance. In this scenario, thermal characterization of ICs and on-chip temperature monitoring represent
Gomez Osuna, Carlos +3 more
core +1 more source
Design of GPU Network-on-Chip for Real-Time Video Super-Resolution Reconstruction. [PDF]
Peng Z, Du J, Qiao Y.
europepmc +1 more source

