Results 141 to 150 of about 1,341 (191)

Demonstration of transformer-based ALBERT model on a 14nm analog AI inference chip. [PDF]

Nat Commun
Chen A, Ambrogio S, Narayanan P, Okazaki A, Mackin C, Fasoli A, Rasch MJ, Friz A, Luquin J, Yasuda T, Ishii M, Kanamori T, Hosokawa K, Philicelli T, Munetoh S, Narayanan V, Tsai H, Burr GW.   +17 more
europepmc   +1 more source

Impact of Fabrication Defects on FPGA Logic Using Memristor-Based Memory Cells. [PDF]

Micromachines (Basel)
Schoenen J, Gehrunger J, Mayrhofer L, Oster T, Piros E, Kim T, Arzumanov A, Miranda E, Hofmann K, Alff L, Hochberger C.   +10 more
europepmc   +1 more source

A Survey of Emerging Memory in a Microcontroller Unit. [PDF]

Micromachines (Basel)
Qi L, Fan J, Cai H, Fang Z.
europepmc   +1 more source

Resistive Switching Random-Access Memory (RRAM): Applications and Requirements for Memory and Computing. [PDF]

Chem Rev
Ielmini D, Pedretti G.
europepmc   +1 more source

Bonding in tellurides. [PDF]

Proc Natl Acad Sci U S A
Lee TH, Elliott S.
europepmc   +1 more source

Improving MRAM Performance with Sparse Modulation and Hamming Error Correction. [PDF]

Sensors (Basel)
Le N, Nguyen TA, Lee JH, Lee J.
europepmc   +1 more source

A tunable multi-timescale Indium-Gallium-Zinc-Oxide thin-film transistor neuron towards hybrid solutions for spiking neuromorphic applications. [PDF]

Commun Eng
Velazquez Lopez M, Linares-Barranco B, Lee J, Erfanijazi H, Patino-Saucedo A, Sifalakis M, Catthoor F, Myny K.   +7 more
europepmc   +1 more source

A neuromorphic processor with on-chip learning for beyond-CMOS device integration. [PDF]

Nat Commun
Greatorex H, Richter O, Mastella M, Cotteret M, Klein P, Fabre M, Rubino A, Soares Girão W, Chen J, Ziegler M, Bégon-Lours L, Indiveri G, Chicca E.   +12 more
europepmc   +1 more source

Integrated Design of Electrically Configurable Ferroelectric and Redox-Based Memristors for Hardware-Implemented Reservoir Computing. [PDF]

Adv Sci (Weinh)
Lee JK, Park Y, Seo E, Lee JH, Kim S, Kim S.   +5 more
europepmc   +1 more source

LRMP: Layer Replication with Mixed Precision for spatial in-memory DNN accelerators. [PDF]

Front Artif Intell
Nallathambi A, Bose CD, Haensch W, Raghunathan A.   +3 more
europepmc   +1 more source