Results 51 to 60 of about 14,907 (188)
A reconfigurable physical unclonable function is developed using CMOS‐integrated SOT‐MRAM chips, leveraging a dual‐pulse strategy and offering enhanced environmental robustness. A temperature‐compensation effect arising from the CMOS transistor and SOT‐MTJ is revealed and established as a key prerequisite for thermal resilience.
Min Wang +7 more
wiley +1 more source
Improving NVM Lifetime Using Task Stack Migration on Low-End MCU-Based Devices
Tiny embedded devices are cost and energy-sensitive, and high-density emerging non-volatile memory (NVM) can help reduce energy consumption at a fraction of the cost. However, high-density NVM has low write endurance compared to volatile memory, so it is
Jeongmin Lee +7 more
doaj +1 more source
Algorithm-Directed Crash Consistence in Non-Volatile Memory for HPC
Fault tolerance is one of the major design goals for HPC. The emergence of non-volatile memories (NVM) provides a solution to build fault tolerant HPC.
Li, Dong +4 more
core +1 more source
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
Open Programming Language Interpreters [PDF]
Context: This paper presents the concept of open programming language interpreters and the implementation of a framework-level metaobject protocol (MOP) to support them.
Cazzola, Walter, Shaqiri, Albert
core +2 more sources
Methods for Setting Device Specifications for Analog In‐Memory Computing Inference
Non‐volatile memories (NVMs) are being developed for analog in‐memory computing for energy‐efficient, high‐speed deep learning inference. As technology is moving to industry adoption, a method to define required NVM specifications is critical for improving performance and reducing manufacturing cost.
Zhenyu Wu +3 more
wiley +1 more source
A memory‐assisted dynamic‐latch ADC integrating charge‐trap flash enables ultra‐low‐energy quantization and in‐ADC nonlinear activation for variation‐tolerant neuromorphic computing. Analog‐to‐digital converters (ADCs) remain the dominant area/energy bottleneck in neuromorphic computing (NC) systems.
Jonghyun Ko +4 more
wiley +1 more source
Natural vegetation management to conserve biodiversity and soil water in olive orchards
The combined impact of soil tillage intensification and expansion of olive farming is resulting in soil degradation and biodiversity decline. We hypothesized that, instead of tilling, mowing to control the natural vegetation in spring can increase ...
Maria P. Simoes +3 more
doaj +1 more source
Accelerating K-mer Frequency Counting with GPU and Non-Volatile Memory
The emergence of Next Generation Sequencing (NGS) platforms has increased the throughput of genomic sequencing and in turn the amount of data that needs to be processed, requiring highly efficient computation for its analysis.
Cadenelli, Nicola +2 more
core +1 more source
Lead‐free inorganic halide perovskites enable resistive switching synaptic devices capable of mimicking biological learning and multimodal information processing, offering a promising platform for next‐generation neuromorphic computing and artificial intelligence hardware. Abstract Inorganic halide perovskites (IHPs) have emerged as promising materials
Subhasish Chanda +7 more
wiley +1 more source

