Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song +10 more
wiley +1 more source
Unintended tripping of healthy parallel lines during single-line-to-ground faults: field evidence and mitigation. [PDF]
Sabagh FA +3 more
europepmc +1 more source
Resistive memory devices are explored for operation at extremely low temperatures relevant to quantum computing. The study reveals how transistor behavior strongly influences memory performance under cryogenic conditions and introduces an optimized programming strategy.
Emilio Pérez‐Bosch Quesada +11 more
wiley +1 more source
Research on a long-haul transmission-line distributed vibration signal denoising method based on dual-fiber sensing and weakly supervised learning. [PDF]
Zhao Z, Tian F.
europepmc +1 more source
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source
Edge CA-CFAR Data Reduction for Bandwidth-Efficient Real-Time Wideband Spectrum Sensing on Low-Cost SDRs. [PDF]
Bae Y, Lee H, Park H, Jang WH, Jang BJ.
europepmc +1 more source
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez +10 more
wiley +1 more source
A configurable streaming spiking neural network accelerator with decoupled pixel-level and output-channel parallelism for automatic modulation classification. [PDF]
Yang K, Eltawil AM, Salama KN.
europepmc +1 more source
On the Role of Preprocessing and Memristor Dynamics in Reservoir Computing for Image Classification
ABSTRACT Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor‐based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time‐series ...
Rishona Daniels +4 more
wiley +1 more source
Blockage-Aware Power Allocation Algorithm for Millimeter-Wave Communication with Dynamic Reward Q-Learning. [PDF]
Yang Z, Chen Z.
europepmc +1 more source

