Results 241 to 250 of about 31,406 (294)

Regulation and function of PLDs in yeast

Biochimica et Biophysica Acta (BBA) - Molecular and Cell Biology of Lipids, 1999
While yeast contain multiple phospholipase D activities, only one, encoded by SPO14, appears to be a member of the phosphatidylcholine-specific phospholipase D gene family. Genetic analyses have revealed a role for this enzyme in regulated membrane trafficking events.
S A, Rudge, J, Engebrecht
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Combination of bevacizumab (A) and pegylated-liposomal doxorubicin (PLD) (PLD-A) in sarcoma (SAR)

Journal of Clinical Oncology, 2006
9556 Background: Vascular endothelial growth factor (VEGF) plays an important role in angiogenesis (AG) in many tumors including SAR. A has demonstrated efficacy in several common solid tumors. Because of the known efficacy of PLD in SAR and the presumed importance of VEGF in SAR, we have treated SAR patients with PLD-A.
P. A. Haddad, K. M. Skubitz
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PLD growth of CuAlO2

Thin Solid Films, 2007
Abstract Copper aluminium oxide, CuAlO 2 (“CAO”) films were deposited by pulsed laser deposition (“PLD”) on a variety of substrates. As-deposited films were X-ray amorphous. Films formed at 200 °C were insulating, whereas films formed on sapphire at 720 °C were conducting. Specific conductivity and light transmittance were optimized for CAO/sapphire.
NEUMANN-SPALLART, M, PAI, SP, PINTO, R
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PLD, complex PLD, and FPGA applications using VHDL

Proceedings of NORTHCON'93 Electrical and Electronics Convention, 2002
An introduction to using VHDL to map designs to PLD, CPLD, and FPGA programmable logic devices is presented. The expressive and portability powers of VHDL have been illustrated by mapping a single design to the three target programmable logic architecture types using a single tool, Warp2.
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The PLD superfamily: insights into catalysis

Biochimica et Biophysica Acta (BBA) - Molecular and Cell Biology of Lipids, 1999
Knowledge of the PLD superfamily is rapidly expanding and new insights into the mechanism and regulation of the superfamily are rapidly emerging. The recent structural analysis and use of mutant proteins suggest a mechanism that involves two active sites acting in concert.
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Fault simulation with PLDs

Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136), 2002
One measure of the effectiveness of fault tolerance in a circuit is fault coverage, the ratio of the number of faults detectable or correctable to the number of possible faults. Fault simulation can provide an estimate of the fault coverage, but is often prohibitively slow if performed in software.
W.L. Gallagher, H.H. Yao, E.E. Swartzlander   +2 more
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Oxide superlattices by PLD: A practical guide

2018
In this chapter, a brief overview of examples is given of the use of pulsed laser deposition (PLD) for the fabrication of complex oxide superlattices. Attention is paid to practical issues, such as the choice of substrates and subsequent surface treatments, the observation of the type of growth that occurs, and growth rate calibration, both using in ...
Koster, G., Huijben, M., Rijnders, A.J.H.M.   +2 more
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Design of a Reversible PLD Architecture

2007
Reversible gate is a circuit that has the same number of inputs and outputs satisfying one-to-one mapping between the vectors of input and output. So far several logic synthesis methods for reversible logic have been proposed, however, they are not able to synthesize a reversible function with input and output of arbitrary width in a constructive ...
Jae-Jin Lee, Dong-Guk Hwang, Gi-Yong Song   +2 more
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Developing critical systems with PLD components

Proceedings of the 10th international workshop on Formal methods for industrial critical systems, 2005
Understanding the roles that rigour and formality can have in the design of critical systems is critical to anyone wishing to contribute to their development. Whereas knowledge of these issues is good in software development, in the use of hardware -- specifically programmable logic devices (PLDs) and the combination of PLDs and software -- the issues ...
Adrian J. Hilton, Jon G. Hall
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Three-level decomposition with application to PLDs

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2002
A scheme for programmable logic array (PLA) decomposition that consists of one level of PLAs followed by a second level of simple two-input logic gates is presented. The propagation delay is therefore the sum of the delay through one level of PLA and one level of two-input gates.
Abdul A. Malik, David Harrison, Robert K. Brayton   +2 more
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