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ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021Deep Neural Networks (DNNs) have gained a strong momentum across various applications in recent years. Meanwhile, they are compute- and memory-intensive as the deep layers induce massive matrix-multiplication operations. The Resistive Random Access Memory (ReRAM) can naturally carry out the matrix-multiplication in memory.
Zhuoran Song +4 more
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Proceedings of the 46th International Symposium on Computer Architecture, 2019
Exploiting model sparsity to reduce ineffectual computation is a commonly used approach to achieve energy efficiency for DNN inference accelerators. However, due to the tightly coupled crossbar structure, exploiting sparsity for ReRAM-based NN accelerator is a less explored area. Existing architectural studies on ReRAM-based NN accelerators assume that
Tzu-Hsien Yang +6 more
openaire +1 more source
Exploiting model sparsity to reduce ineffectual computation is a commonly used approach to achieve energy efficiency for DNN inference accelerators. However, due to the tightly coupled crossbar structure, exploiting sparsity for ReRAM-based NN accelerator is a less explored area. Existing architectural studies on ReRAM-based NN accelerators assume that
Tzu-Hsien Yang +6 more
openaire +1 more source
Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture
2019 35th Symposium on Mass Storage Systems and Technologies (MSST), 2019Resistive Memory (ReRAM) is promising to be used as high density storage-class memory by employing Triple-Level Cell (TLC) and crossbar structures. However, TLC crossbar ReRAM suffers from high write latency and energy due to the IR drop issue and the iterative program-and-verify procedure.
Yang Zhang +5 more
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2014
This deliverable D6.1 reports on the progress of the website development, which has been setup in multiple languages to attain a maximum of different target audiences.
Kies, Uwe, Akhobadze, Sophiko
openaire +1 more source
This deliverable D6.1 reports on the progress of the website development, which has been setup in multiple languages to attain a maximum of different target audiences.
Kies, Uwe, Akhobadze, Sophiko
openaire +1 more source
ECS Meeting Abstracts, 2016
We demonstrate a silicon oxide redox-based resistive RAM (ReRAM) device. The resistance switching in our devices is intrinsic to changes within the oxide layer and thus it is not an effect of diffusion of metallic ions from the metallic electrode as in the case of electrochemical metallization (ECM) cells.
Adnan Mehonic +7 more
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We demonstrate a silicon oxide redox-based resistive RAM (ReRAM) device. The resistance switching in our devices is intrinsic to changes within the oxide layer and thus it is not an effect of diffusion of metallic ions from the metallic electrode as in the case of electrochemical metallization (ECM) cells.
Adnan Mehonic +7 more
openaire +1 more source
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017This paper presents an automatic resistive random access memory (ReRAM) SPICE model generator, which enables fast ReRAM circuit evaluation with standard SPICE. Our model generator automatically produces SPICE models of ReRAM devices and selectors from the measured ${I}$ – ${V}$ data to reduce too much time consumption in manual model ...
Jaehyun Seo +5 more
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Tileable Monolithic ReRAM Memory Design
2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 2020Non-volatile memory, such as resistive RAM (ReRAM), is compatible with standard CMOS logic processes, allowing a sizable main memory system to be integrated into a CPU’s die. ReRAM bitcells are fabricated within crosspoint sub-arrays that leave the bulk of transistors underneath the sub-arrays vacant.
Meenatchi Jagasivamani +7 more
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Leveraging Capacitance Modulation of ReRAM for CMOS-ReRAM Image Sensor
2025 Device Research Conference (DRC)The rapid expansion of applications in the Internet of Things, biomedical imaging, unmanned aerial vehicle imaging, and smart devices drives the increasing demand for advanced image sensors. Conventional CMOS image sensors (CIS) are widely employed in these domains but are limited by their relatively low dynamic range (DR).
Chourasia, S. +3 more
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