Results 31 to 40 of about 1,751 (142)

Enhanced switching stability in Ta 2 O 5 resistive RAM by fluorine doping [PDF]

, 2017
The effect of fluorine doping on the switching stability of Ta2O5 resistive random access memory devices is investigated. It shows that the dopant serves to increase the memory window and improve the stability of the resistive states due to the ...
Brunell, IF, Chalker, PR, Dawson, K, Dhanak, VR, Gibbon, JT, Guo, Y, Hall, S, Li, H, Potter, RJ, Robertson, J, Sedghi, N, Zhang, JF, Zhang, WD   +12 more
core   +2 more sources

An On-chip Trainable and Clock-less Spiking Neural Network with 1R Memristive Synapses

, 2017
Spiking neural networks (SNNs) are being explored in an attempt to mimic brain's capability to learn and recognize at low power. Crossbar architecture with highly scalable Resistive RAM or RRAM array serving as synaptic weights and neuronal drivers in ...
Ganguly, Udayan, Shukla, Aditya
core   +1 more source

Analysis on the Filament Structure Evolution in Reset Transition of Cu/HfO2/Pt RRAM Device [PDF]

, 2016
The resistive switching (RS) process of resistive random access memory (RRAM) is dynamically correlated with the evolution process of conductive path or conductive filament (CF) during its breakdown (rupture) and recovery (reformation).
Enrique Miranda, Hangbing Lv, Jordi Suñé, Meiyun Zhang, Ming Liu, Qi Liu, Shibing Long, Yang Li   +7 more
core   +3 more sources

Assessing the forming temperature role on amorphous and polycrystalline HfO2-based 4 kbit RRAM arrays performance [PDF]

, 2017
The impact of temperature during the forming operation on the electrical cells performance and the post-programming stability were evaluated in amorphous and polycrystalline HfO2-based arrays.
Bondesan, L., Grossi, Alessandro, Olivo, Piero, Perez, E, Wenger, C. h., Zambelli, Cristian   +5 more
core   +1 more source

Noise Fingerprints as a Quantitative Order Parameter for Polarization‐ and Defect‐Mediated Switching in Hafnia Ferroelectrics

Advanced Science, EarlyView.
Low‐frequency noise fingerprints in hafnia ferroelectrics provide a quantitative handle to resolve the long‐standing debate between polarization‐mediated and defect‐mediated switching. By tuning oxygen vacancy density via ALD O3 dose time and applying a physically constrained deconvolution, we extract bias‐resolved current fractions for both mechanisms
Ryun‐Han Koo, Jiseong Im, Joon Hwang, Sung‐Ho Park, Jonghyun Ko, Kangwook Choi, Sangwoo Ryu, Gyuweon Jung, Jong‐Ho Lee   +8 more
wiley   +1 more source

SPIKA: an energy-efficient time-domain hybrid CMOS-RRAM compute-in-memory macro

Frontiers in Electronics
The increasing significance of machine learning (ML) has led to the development of circuit architectures suited to handling its multiply-accumulate-heavy computational load such as Compute-In-Memory (CIM). A big class of such architectures uses resistive
Khaled Humood, Yihan Pan, Grahame Reynolds, Mohammed Mughal, Shiwei Wang, Alexander Serb, Themis Prodromakis   +6 more
doaj   +1 more source

RRAM Based Random Bit Generation for Hardware Security Applications [PDF]

, 2016
© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new
Arumi Delgado, Daniel, Manich Bou, Salvador, Pehl, Michael, Rodríguez Montañés, Rosa   +3 more
core   +1 more source

RRAM Variability Harvesting for CIM‐Integrated TRNG

Advanced Electronic Materials, EarlyView.
This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende, Gokulnath Rajendran, Regina Dittmann, Anupam Chattopadhyay, Vikas Rana   +4 more
wiley   +1 more source

An RRAM biasing parameter optimizer [PDF]

, 2015
Research on memory devices is a highly active field, and many new technologies are being constantly developed. However, characterizing them and understanding how to bias for optimal performance are becoming an increasingly tight bottleneck.
Khiat, Ali, Prodromakis, Themistoklis, Serb, Alexantrou   +2 more
core   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source