Results 11 to 20 of about 22,912 (307)
Low-Power Magnetic Displacement Sensor Based on RISC-V Embedded System [PDF]
SensorsWith the emergence of RISC-V architecture in embedded devices, its inherent low-power features have propelled its extensive adoption across various industrial settings.
Tao Sun, Yue Song, Huiyun Yang
doaj +2 more sources
Design of Hardware Accelerators for Optimized and Quantized Neural Networks to Detect Atrial Fibrillation in Patch ECG Device with RISC-V. [PDF]
Sensors (Basel), 2023 Hoyer I +6 more
europepmc +3 more sources
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI [PDF]
IEEE Journal of Solid-State Circuits, 2016 This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V ...
Brian Zimmer +2 more
exaly +3 more sources
Co-designing ab initio electronic structure methods on a RISC-V vector architecture. [PDF]
Open Res EurGrima Torres R +3 more
europepmc +2 more sources
Epileptic Seizure Detection on an Ultra-Low-Power Embedded RISC-V Processor Using a Convolutional Neural Network [PDF]
Biosensors, 2021 Andreas Bahr, Peer Wulff, Th Strunskus
exaly +2 more sources
Optimization Strategy of FFmpeg Multimedia Algorithm Library Based on RISC-V [PDF]
Jisuanji gongcheng, 2023 The widespread application of RISC-V processors has made the high-performance implementation of FFmpeg multimedia algorithm library on the RISC-V platform increasingly important.This study proposes a series of RISC-V architecture-based optimization ...
ZHANG Zhen, LIANG Jun, JIA Haipeng, ZHANG Yunquan, LI Qing
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Proceedings of the 52nd ACM Technical Symposium on Computer Science Education, 2021 We describe our experience teaching an undergraduate capstone (and elective graduate course) in computer architecture with a semester-long project in which teams of five students design and implement an out-of-order (OoO) pipelined processor core using the open-source RISC-V instruction set.
Stephen A. Zekany +3 more
openaire +1 more source
A Survey of the RISC-V Architecture Software Support
IEEE Access, 2022 RISC-V is a novel open instruction set architecture that supports multiple platforms while maintaining simplicity and reliability. Despite its novelty, the software support for RISC-V has been increasing in the last years, given that popular toolchains ...
Benjamin W. Mezger +4 more
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IEEE Access, 2021 A trusted execution environment (TEE) is a new hardware security feature that is isolated from a normal OS (i.e., rich execution environment (REE)). The TEE enables us to run a critical process, but the behavior is invisible from the normal OS, which ...
Kuniyasu Suzaki +3 more
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Developing a Multicore Platform Utilizing Open RISC-V Cores
IEEE Access, 2021 RISC-V has been experiencing explosive growth since its first appearance in 2011. Dozens of free and open cores developed based on this instruction set architecture have been released, and RISC-V based devices optimized for specific applications such as ...
Hyeonguk Jang +6 more
doaj +1 more source