Results 31 to 40 of about 7,414,880 (281)
Taking on RISC for Energy-Efficient Computing in HEP [PDF]
EPJ Web of ConferencesIn pursuit of energy-efficient solutions for computing in High Energy Physics (HEP) we have extended our investigations of non-x86 architectures beyond the ARM platforms that we have previously studied. In this work, we have taken a first look at the RISC-V
Simili Emanuele +6 more
doaj +1 more source
Return-Oriented Programming in RISC-V
CoRR, 2020 RISC-V is an open-source hardware ISA based on the RISC design principles, and has been the subject of some novel ROP mitigation technique proposals due to its open-source nature. However, very little work has actually evaluated whether such an attack is feasible assuming a typical RISC-V implementation.
Garrett Gu, Hovav Shacham
openaire +2 more sources
Optimized Implementation of PIPO Block Cipher on 32-Bit ARM and RISC-V Processors
IEEE Access, 2022 A lightweight block cipher PIPO-64/128 was presented in ICISC’2020. PIPO of the 8-bit unit using an unbalanced-bridge S-box showed better performance than other lightweight block cipher algorithms on an 8-bit AVR environment.
Youngbeom Kim, Seog Chung Seo
doaj +1 more source
A Pluggable Vector Unit for RISC-V Vector Extension
, 2022 Vector extensions have become increasingly important for accelerating data-parallel applications in areas like multimedia, data-streaming, and Machine Learning.
Maisto V., Cilardo A.
core +1 more source
The RISC-V in implantable medical devices [PDF]
, 2019 In this work, first, the case of implantable medical devices (IMDs) will be presented including state of the art and industry overview. The main characteristics of IMD ASICs are discussed (technical, engineering, business point of view).
Arnaud Maceira, Alfredo
core +1 more source
A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs [PDF]
, 2023 Microarchitectural attacks threaten the security of computer systems even in the absence of software vulnerabilities. Such attacks are well explored on x86 and ARM CPUs, with a wide range of proposed but not-yet deployed hardware countermeasures.
Gerlach, Lukas +3 more
core +2 more sources
A Survey on RISC-V-Based Machine Learning Ecosystem
Information, 2023 In recent years, the advancements in specialized hardware architectures have supported the industry and the research community to address the computation power needed for more enhanced and compute intensive artificial intelligence (AI) algorithms and ...
Stavros Kalapothas +4 more
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An ultra-low-power processor pipeline-structure
Dianzi Jishu Yingyong, 2019 With the rapid development of communication and chip technology, IoT will be an important part of the next generation of information technology, a powerful driving force to promote the intelligent process of our lives. Among the IoT terminal applications,
Deng Tianchuan, Hu Zhenbo
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Design and verification of a RISC-V Superscalar CPU [PDF]
, 2023 LAUREA MAGISTRALENegli ultimi decenni, il mercato si è sviluppato in modo tale che la maggior parte delle applicazioni richiede una specifica gamma di prestazioni, area e consumo energetico. Questa necessità ha portato alla continua ricerca di maggiore
VITALI, MARCO, VITTORIA, SEBASTIANO
core
The RISC-V FPGA (RVfpga) Teaching Package
IEEE AccessRISC-V is a free and open-standard ISA based on RISC principles, allowing anyone to design, manufacture, and sell RISC-V chips and software. Its flexibility and growing ecosystem have made it popular in research, education, and industry, increasing the ...
Daniel Chaver +17 more
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