Results 11 to 20 of about 24,258 (296)
Low-Power Magnetic Displacement Sensor Based on RISC-V Embedded System [PDF]
SensorsWith the emergence of RISC-V architecture in embedded devices, its inherent low-power features have propelled its extensive adoption across various industrial settings.
Tao Sun, Yue Song, Huiyun Yang
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Design of Hardware Accelerators for Optimized and Quantized Neural Networks to Detect Atrial Fibrillation in Patch ECG Device with RISC-V. [PDF]
Sensors (Basel), 2023 Hoyer I +6 more
europepmc +3 more sources
Co-designing ab initio electronic structure methods on a RISC-V vector architecture. [PDF]
Open Res EurGrima Torres R +3 more
europepmc +2 more sources
Optimization Strategy of FFmpeg Multimedia Algorithm Library Based on RISC-V [PDF]
Jisuanji gongcheng, 2023 The widespread application of RISC-V processors has made the high-performance implementation of FFmpeg multimedia algorithm library on the RISC-V platform increasingly important.This study proposes a series of RISC-V architecture-based optimization ...
ZHANG Zhen, LIANG Jun, JIA Haipeng, ZHANG Yunquan, LI Qing
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Proceedings of the 52nd ACM Technical Symposium on Computer Science Education, 2021 We describe our experience teaching an undergraduate capstone (and elective graduate course) in computer architecture with a semester-long project in which teams of five students design and implement an out-of-order (OoO) pipelined processor core using the open-source RISC-V instruction set.
Stephen A. Zekany +3 more
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IEEE Access, 2021 A trusted execution environment (TEE) is a new hardware security feature that is isolated from a normal OS (i.e., rich execution environment (REE)). The TEE enables us to run a critical process, but the behavior is invisible from the normal OS, which ...
Kuniyasu Suzaki +3 more
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Developing a Multicore Platform Utilizing Open RISC-V Cores
IEEE Access, 2021 RISC-V has been experiencing explosive growth since its first appearance in 2011. Dozens of free and open cores developed based on this instruction set architecture have been released, and RISC-V based devices optimized for specific applications such as ...
Hyeonguk Jang +6 more
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Holistic RISC-V Virtualization
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023 This work describes our efforts to provide a holistic hardware RISC-V virtualization SoC based on the CVA6 core. At the core level, we implemented hardware support for virtualization through the ratified Hypervisor instruction set architecture (ISA) extension version 1.0.
Bruno Sá +4 more
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Journal of Low Power Electronics and Applications, 2022 With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a ...
Peter Jamieson +7 more
doaj +1 more source
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications [PDF]
, 2019 This paper presents a reconfigurable cryptographic engine that implements the DTLS protocol to enable end-to-end security for IoT. This implementation of the DTLS engine demonstrates 10x reduction in code size and 438x improvement in energy-efficiency ...
Arvind +4 more
core +5 more sources