Results 31 to 40 of about 22,912 (307)
The design of scalar AES Instruction Set Extensions for RISC-V
Transactions on Cryptographic Hardware and Embedded Systems, 2020 Secure, efficient execution of AES is an essential requirement on most computing platforms. Dedicated Instruction Set Extensions (ISEs) are often included for this purpose. RISC-V is a (relatively) new ISA that lacks such a standardized ISE.
Ben Marshall +4 more
doaj +3 more sources
Taking on RISC for Energy-Efficient Computing in HEP [PDF]
EPJ Web of ConferencesIn pursuit of energy-efficient solutions for computing in High Energy Physics (HEP) we have extended our investigations of non-x86 architectures beyond the ARM platforms that we have previously studied. In this work, we have taken a first look at the RISC-V
Simili Emanuele +6 more
doaj +1 more source
Optimized Implementation of PIPO Block Cipher on 32-Bit ARM and RISC-V Processors
IEEE Access, 2022 A lightweight block cipher PIPO-64/128 was presented in ICISC’2020. PIPO of the 8-bit unit using an unbalanced-bridge S-box showed better performance than other lightweight block cipher algorithms on an 8-bit AVR environment.
Youngbeom Kim, Seog Chung Seo
doaj +1 more source
Code trolley: hardware-assisted control flow obfuscation [PDF]
, 2020 Many cybersecurity attacks rely on analyzing a binary executable to find exploitable sections of code. Code obfuscation is used to prevent attackers from reverse engineering these executables.
Boskov, Novak +2 more
core +2 more sources
Analysis on the Possibility of RISC-V Adoption [PDF]
, 2020 As the interface between hardware and software, Instruction Set Architectures (ISAs) play a key role in the operation of computers. While both hardware and software have continued to evolve rapidly over time, ISAs have undergone minimal change. Since its
Scott, Ian
core
RISC-V: #AlphanumericShellcoding
, 2019 25 pages, originally published at WOOT ...
Barral, Hadrien +3 more
openaire +2 more sources
An ultra-low-power processor pipeline-structure
Dianzi Jishu Yingyong, 2019 With the rapid development of communication and chip technology, IoT will be an important part of the next generation of information technology, a powerful driving force to promote the intelligent process of our lives. Among the IoT terminal applications,
Deng Tianchuan, Hu Zhenbo
doaj +1 more source
BRISC-V emulator: a standalone, installation-free, browser-based teaching tool [PDF]
, 2020 Many computer organization and computer architecture classes have recently started adopting the RISC-V architecture as an alternative to proprietary RISC ISAs and architectures.
Isakov, Mihailo, Kinsy, Michel A.
core
A Scalable, Portable, and Memory-Efficient Lock-Free FIFO Queue [PDF]
, 2019 We present a new lock-free multiple-producer and multiple-consumer (MPMC) FIFO queue design which is scalable and, unlike existing high-performant queues, very memory efficient.
Nikolaev, Ruslan
core +2 more sources
ChaCha20–Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3
Cryptography, 2022 Transport Layer Security (TLS) provides a secure channel for end-to-end communications in computer networks. The ChaCha20–Poly1305 cipher suite is introduced in TLS 1.3, mitigating the sidechannel attacks in the cipher suites based on the Advanced ...
Ronaldo Serrano +4 more
doaj +1 more source