Results 31 to 40 of about 21,625 (285)
Optimization Strategy of FFmpeg Multimedia Algorithm Library Based on RISC-V [PDF]
Jisuanji gongcheng, 2023 The widespread application of RISC-V processors has made the high-performance implementation of FFmpeg multimedia algorithm library on the RISC-V platform increasingly important.This study proposes a series of RISC-V architecture-based optimization ...
ZHANG Zhen, LIANG Jun, JIA Haipeng, ZHANG Yunquan, LI Qing
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A Survey of the RISC-V Architecture Software Support
IEEE Access, 2022 RISC-V is a novel open instruction set architecture that supports multiple platforms while maintaining simplicity and reliability. Despite its novelty, the software support for RISC-V has been increasing in the last years, given that popular toolchains ...
Benjamin W. Mezger +4 more
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IEEE Access, 2021 A trusted execution environment (TEE) is a new hardware security feature that is isolated from a normal OS (i.e., rich execution environment (REE)). The TEE enables us to run a critical process, but the behavior is invisible from the normal OS, which ...
Kuniyasu Suzaki +3 more
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Return-Oriented Programming on RISC-V [PDF]
Proceedings of the 15th ACM Asia Conference on Computer and Communications Security, 2020 This paper provides the first analysis on the feasibility of Return-Oriented Programming (ROP) on RISC-V, a new instruction set architecture targeting embedded systems. We show the existence of a new class of gadgets, using several Linear Code Sequences And Jumps (LCSAJ), undetected by current Galileo-based ROP gadget searching tools.
Jaloyan, Georges-Axel +5 more
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Satellite Onboard Data Reduction Using a Risc-V Core Inside an RTG4-Based Data Processing Pipeline [PDF]
Architecture of Computing Systems – ARCS 202033rd International Conference, 2020 Skvarc Bozic G, Ott S, Plattner M.
europepmc +3 more sources
Developing a Multicore Platform Utilizing Open RISC-V Cores
IEEE Access, 2021 RISC-V has been experiencing explosive growth since its first appearance in 2011. Dozens of free and open cores developed based on this instruction set architecture have been released, and RISC-V based devices optimized for specific applications such as ...
Hyeonguk Jang +6 more
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Hypervisor Extension for a RISC-V Processor
2023 RISC-V Summit Europe, 2023 This work is partially supported by the DRAC (IU16-011591), the HORIZON Vitamin-V (101093062) and the Computación de Altas Prestaciones VIII (PID2019-107255GB) projects.
Gauchola Vilardell, Jaume +10 more
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LLVM RISC-V RV32X Graphics Extension Support and Characteristics Analysis of Graphics Programs
IEEE Access, 2023 In recent years, virtual reality technology has become the dominant means of human-computer interaction, with computer graphics rendering technology being a crucial component in realizing virtual reality experiences.
Peng Wang, Zhi-Bin Yu
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Journal of Low Power Electronics and Applications, 2022 With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a ...
Peter Jamieson +7 more
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Proceedings of the Institute for System Programming of the RAS, 2020 An Instruction Set Architecture (ISA) is the core around which the rest of the CPU is built. Errors or inflexibility in decisions once embedded in a system of instructions remain with this generation of processors forever. Therefore, one of the key reasons why the performance growth of modern CPUs has slowed down is that the source code of the ...
Vladimir Alexandrovitch Frolov +2 more
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