Results 61 to 70 of about 6,460 (218)
A 4.5-5.8 GHz Differential LC VCO using 0.35 m SiGe BiCMOS Technology [PDF]
In this paper, design and realization of a 4.5-5.8 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is implemented with 0.35´m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar ...
Esame, İbrahim Onur +5 more
core
Multi-Gigabit Wireless data transfer at 60 GHz
In this paper we describe the status of the first prototype of the 60 GHz wireless Multi-gigabit data transfer topology currently under development at University of Heidelberg using IBM 130 nm SiGe HBT BiCMOS technology.
A Schöning +6 more
core +1 more source
53 GBd PAM-4 DAC-less low-power (1.5 pJ/b) silicon integrated transmitter [PDF]
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Bauwelinck, Johan +10 more
core +2 more sources
This letter presents the first demonstration of laser induced deep etching technology (LIDE) for fabricating highly precise antennas designed for sub‐THz applications. Specifically, it details the design, fabrication, and measurement of two antenna prototypes: a single rectangular dielectric resonator antenna (RDRA) and a 4×$\times$4 RDRA array.
Elizabeth Bekker +6 more
wiley +1 more source
We report the design of a 112 Gb/s radiation-hardened (RH) optical transceiver applicable to intra-satellite optical interconnects. The transceiver chipset comprises a vertical-cavity surface-emitting laser (VCSEL) driver and transimpedance amplifier ...
Stavros Giannakopoulos +17 more
doaj +1 more source
A Cascode Pair Based on SiGe HPT for RoF/LiFi Applications
In this letter, a Si/SiGe phototransistor fully integrated in an industrial 55‐nm node BiCMOS technology is incorporated in a cascode pair for high‐speed photodetection. After having presented the phototranistor structure, the opto‐microwave performances are discussed and compared with a single stage phototransistor.
Thary Valentin +3 more
wiley +1 more source
Charge pump design in 130 nm SiGe BiCMOS technology for low-noise fractional-N PLLs [PDF]
This paper presents a numerical comparison of charge pumps (CP) designed for a high linearity and a low noise to be used in a fractional-N phase-locked loop (PLL). We consider a PLL architecture, where two parallel CPs with DC offset are used. The CP for
M. Kucharski, F. Herzel
doaj +1 more source
Design and layout strategies for integrated frequency synthesizers with high spectral purity [PDF]
Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich.This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence
Herzel, Frank, Kissinger, Dietmar
core +1 more source
A 18‐36 GHz Noise Cancelling Low‐Noise Amplifier With 2.9 dB NF in 130 nm SiGe BiCMOS
This paper presents a broadband noise‐canceling low‐noise amplifier (LNA) implemented in a 130‐nm SiGe BiCMOS process. The first stage employs a parallel architecture, combining a common‐base amplifier with a resistive feedback common‐emitter amplifier, to achieve noise cancellation.
Wenyan lyu +5 more
wiley +1 more source
A digitally controlled threshold adjustment circuit in a 0.13um SiGe BiCMOS technology for receiving multilevel signals up to 80Gbps [PDF]
In this paper, a high bandwidth digitally controlled threshold adjustment circuit is proposed which can be used for demodulating high-speed multi-level signals. Simulations of the bandwidth are presented together with measurements of the control currents
Bauwelinck, Johan +3 more
core +1 more source

