Results 11 to 20 of about 3,837 (261)
In this paper the results of architecture development, layout designof analytical microsystem-on-chip with the structures "silicon-on-insulator" (SOI) and its elements schemotechnical computer simulation for determine their electrical and time ...
V. V. Dovgiy, I. T. Kohut, V. I. Golota
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High-Q TeO2–Si Hybrid Microring Resonators
We present the design and experimental measurement of tellurium oxide-clad silicon microring resonators with internal Q factors of up to 1.5 × 106, corresponding to a propagation loss of 0.42 dB/cm at wavelengths around 1550 nm.
Khadijeh Miarabbas Kiani +3 more
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A silicon-on-insulator (SOI) device is an important integrated circuit technology containing an insulating material. In this paper, an SOI wafer consisting of n-type silicon grown on the surface of a SiO2 layer was adopted.
Xiaoyi Lv +6 more
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Fabrication and characterization of silicon-on-insulator wafers
Silicon-on-insulator (SOI) wafers offer significant advantages for both Integrated circuits (ICs) and microelectromechanical systems (MEMS) devices with their buried oxide layer improving electrical isolation and etch stop function.
Taeyeong Kim, Jungchul Lee
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Design Technology Co-Optimization Strategy for Ge Fraction in SiGe Channel of SGOI FinFET
FinFET devices and Silicon-On-Insulator (SOI) devices are two mainstream technical routes after the planar MOSFET reached the limit for scaling. The SOI FinFET devices combine the benefits of FinFET and SOI devices, which can be further boosted by SiGe ...
Shixin Li, Zhenhua Wu
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SOI (silicon-on-insulator) structures with strained and unstrained silicon layers were studied by ultrasoft X-ray emission spectroscopy and X-ray absorption near edge structure spectroscopy with the use of synchrotron radiation techniques.
Vladimir A. Terekhov +5 more
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Two Dimensional Analytical Modeling for SOI and SON MOSFET and Their Performance Comparison [PDF]
During last few decade continuous device performance improvements have been achieved through a combination of device scaling, new device structures and material property improvement to its fundamental limits.
Saptarsi Ghosh +3 more
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Optimization of Hybrid Silicon Microring Lasers
In this paper, we review the recent optimization work in hybrid silicon microring lasers. Device structure and fabrication procedures are discussed first, followed by two major improvements in carrier injection and thermal management.
D. Liang +6 more
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Analysis of Voltage Transfer Characteristics of Nano-scale SOI CMOS Inverter with Variable Channel Length and Doping Concentration [PDF]
During many decades, continuous device performance improvement has been made possible only through device scaling. But presently, due to aggressive scaling at the sub-micron or nanometer region, the conventional planner silicon technology is suffering ...
A. Daniyel Raj +2 more
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Fully Depleted SOI Technology for Millimeter-Wave Integrated Circuits
Performances of high-frequency integrated circuits are directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate.
Jean-Pierre Raskin
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