Results 81 to 90 of about 42,896 (310)
Nano-layer structure of silicon-on-insulator materials [PDF]
Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits.
Chen J +8 more
core +2 more sources
Spatially Modulated Morphotropic Phase Boundaries in a Compressively Strained Multiferroic Thin Film
ABSTRACT The coexisting rhombohedral‐like (R′, MA) and tetragonal‐like (T′, MC) monoclinic phases in compressively strained bismuth ferrite thin films exhibit exceptional piezoelectric and magnetic properties. While previous studies have largely focused on probing the morphotropic phase boundaries (MPBs) comprising ordered R′/T′ twins, their self ...
Ting‐Ran Liu +7 more
wiley +1 more source
Structure and electrical characteristics of a thin buried oxide containing silicon inclusions [PDF]
S.224-229This paper deals with the characterization of a thin (100 nm) buried oxide in an SOI structure. Although in principle thin oxide layers without any silicon inclusion could be formed, the buried oxides (BOXes) commonly produced in a single-step ...
Bertoni, S. +4 more
core
Investigation of Ultrasmall
Optoelectronic integration technologies based on silicon-on-insulator (SOI) can bring revolutionary change to on-chip arrayed waveguide grating (AWG) demodulation systems.
Hongqiang Li +3 more
doaj +1 more source
Ferroelectric tunnel junction devices based on epitaxial undoped ferroelectric HfO2 films demonstrate stable switching endurance of over 106 switching cycles, low write voltages of ±3 V, 16 measured resistance states, and neuromorphic capability.
Markus Hellenbrand +13 more
wiley +1 more source
Depletion-Isolation Effect in Vertical MOSFETs During the Transition From Partial to Fully Depleted Operation [PDF]
A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm.
Ashburn, Peter +5 more
core
The coupled nonlinear Schrödinger (NLS) equations describing power and phase of the optical waves are used to model phase-sensitive (PS) parametric amplification in a width-modulated silicon-on-insulator (SOI) channel waveguide.
Xuefeng Li, Zhaolu Wang, Hongjun Liu
doaj +1 more source
Wafer‐scale two‐dimensioanl In2Se3 oxidized into InOx on sodium‐embedded beta‐alumina enables multifunctional reconfigurable electronics. Sodium ions accumulate within distinct spatial distribution under drain‐controlle and gate‐controlled operation. Drain‐control operation gives controllability of ultraviolet‐driven optoelectronic synaptic conductance
Jinhong Min +13 more
wiley +1 more source
LDMOS transistors on 150 mm silicon-on-polycrystalline-silicon carbide hybrid substrates [PDF]
Silicon based RF and power devices need a substrate that conducts heat better than conventional SOI-substrates. Here, the silicon dioxide insulator and the silicon substrate as in a SOI-wafer, are replaced by silicon carbide (SiC) which has higher ...
Norström, Hans, +5 more
core
Low-loss slot waveguides with silicon (111) surfaces realized using anisotropic wet etching
We demonstrate low-loss slot waveguides on silicon-on-insulator (SOI) platform. Waveguides oriented along the (11-2) direction on the Si (110) plane were first fabricated by a standard e-beam lithography and dry etching process.
Kapil Debnath +7 more
doaj +1 more source

