Results 91 to 100 of about 54,444 (308)
Development and improvement of methods for reducing contamination of silicon-kerf from wafer slicing
International audienceThe work, carried out within the framework of the European project ICARUS, concerns the quality improvement of silicon powder resulting from wafer slicing, in photovoltaic industry.
Coustier, Fabrice +2 more
core +1 more source
The influence of holes in the mechanical properties of EWT solar cells
EWT back contact solar cells are manufactured from very thin silicon wafers. These wafers are drilled by means of a laser process creating a matrix of tiny holes with a density of approximately 125 holes per square centimeter.
Fraile, A. +11 more
core +1 more source
Direct bonding with on-wafer metal interconnections
S.391-396A low temperature direct bonding process with encapsulated metal interconnections was proposed. The process can be realized between silicon wafers or silicon and glass wafers.
Jia, C., Wiemer, M., Gessner, T.
core +1 more source
A dye‐based photoinitiator acting as a structure‐directing element, guides the formation of a cholesteric polymer network that behaves as a chirped photonic structure with dissipative chiral coupling. Photopolymerization freezes a depth‐dependent helical pitch, broadening the Bragg resonance spectrum.
Alfredo Mazzulla +2 more
wiley +1 more source
We introduce a capillary‐filtering‐based particle‐filling (CFPF) process that simultaneously forms vertical thermal pathways and electrical vias within µ‐pores. In situ microfluidic analysis reveals that capillary‐driven velocity gradients generate vorticity that governs µ‐platelet rotation and vertical alignment.
Yujin Mun +11 more
wiley +1 more source
A Wafer-Level Fabricated Heating–Vacuum Micro-Platform with Resonant MEMS Monolithically Integrated
This paper presents a silicon-based wafer-level vacuum packaging platform with a monolithically integrated micro-oven. This system provides vacuum and constant temperature operating conditions to improve the performance of resonant micro-electro ...
Kaixuan He +7 more
doaj +1 more source
Semiconductor process technology increasingly requires high accuracy and efficiency. In the case of processing thin fragile substrate such as silicon wafer, it has to be fixed with low strain.
Masayuki TANAKA +4 more
doaj +1 more source
Wafer bondig for integrated III-V frequency multipliers on silicon
In this paper low temperature (LT) plasma assisted wafer bonding for integration of an InGaAs/InAlAs/AlAs epitaxial strucutre is utilised to fabricate a heterostrucutre barrier varactor (HBV).
Zhao Ternehäll, Huan, +4 more
core
Effects of dielectric barrier discharge treatment on the surface of silicon wafers
S.41-42The impact of an atmospheric-pressure dielectric barrier discharge (DBD) in oxygen on the chemistry and morphology of silicon wafer surfaces was investigated.
Klages, C.-P., Michel, B., Eichler, M.
core
Early selection of system implementation choice among SoC, SoP and 3-D integration. [PDF]
Recently there is a tendency for shifting the planar SoC single-chip solutions to different alternative options as tiled silicon and single-level embedded modules as well as 3-D integration, and the designers confronted with several system design options.
Zheng, Li-Rong, +11 more
core +1 more source

