Results 251 to 260 of about 54,444 (308)
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Fracture of silicon wafers

Journal of Crystal Growth, 1987
Abstract In spite of the increasing use of silicon in applications where mechanical stresses are deliberately applied to the material, such as in transducers, and the fatal nature of cracking in silicon devices, there is very limited characterisation and understanding of the fracture behaviour of silicon wafers at room temperature. This understanding
J.C. McLaughlin, A.F.W. Willoughby
openaire   +1 more source

Warpage of Silicon Wafers

Journal of The Electrochemical Society, 1980
High temperature processing of Czochralski grown silicon wafers can create temperature gradients high enough to generate slip. The generation of slip and the slip patterns have been found to depend on three factors: the temperature and the temperature gradient, the amount and form of the precipitated oxygen, and the direction of the initial bow and the
B. Leroy, C. Plougonven
openaire   +1 more source

Bonding of silicon wafers for silicon-on-insulator

Journal of Applied Physics, 1988
Several aspects of a new silicon-on-insulator technique utilizing bonding of oxidized silicon wafers were investigated. The bonding was achieved by heating in an inert atmosphere a pair of wafers with hydrophilic surfaces contacted face-to-face. A quantitative method for the evaluation of the surface energy of the bond based on crack propagation theory
W. P. Maszara   +3 more
openaire   +1 more source

Direct Wafer Bonding of Preamorphized Silicon Wafers.

MRS Proceedings, 1995
AbstractThis paper presents the comparison of the structural and electrical characteristics of Si/Si bonded interfaces depending on whether the surface layers were rendered amorphous by high dose ion implantation prior to annealing or not. While the general structure of the interfaces is the same when the wafers are preamorphized more precipitates are ...
A. Laporte   +6 more
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IC-compatible silicon wafer-to-wafer bonding

Sensors and Actuators A: Physical, 1997
Abstract In this paper a fully IC-compatible silicon wafer-to-wafer fusion-bonding process is described. Before the bonding, the silicon surfaces are treated by chemicals which do not attack the electronic circuits or aluminium patterns on the silicon. The prebonding of the two silicon wafers is performed at room temperature.
A Berthold, M.J Vellekoop
openaire   +1 more source

Wafering of Silicon

2015
Abstract Semiconductor bulk crystals have to be cut into wafers for further applications. The dominant slicing technique both for microelectronic and photovoltaic applications is the multiwire sawing method. The requirements on the processes and wafer qualities depend on the material and the application.
openaire   +1 more source

Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

Nanotechnology, 2014
Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication.
Cunning, Benjamin V   +5 more
openaire   +4 more sources

Magnetostatic wave transducers on silicon wafers and on silicon membranes

1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351), 2002
The paper presents the design, realisation and experiments of MSW launchers and detectors made on silicon wafers and silicon membranes. S parameters measurement on ferrite unloaded and on magnetised ferrite loaded structures demonstrates the feasibility of such transducer.
E Matei   +4 more
openaire   +1 more source

Silicon wafer modification by laser interference

The 8th Annual IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2013
This paper presents the study of silicon wafer modification by two-beam laser interference. In the work, two-beam laser interference was used to pattern single crystal silicon wafers for the fabrication of gratings, and different laser fluences and pulses were applied to the process in the air.
Le Zhao   +8 more
openaire   +1 more source

Direct Microrolling Processing on a Silicon Wafer

Small, 2017
Although, varieties of micro‐ to nanoscale fabrication technologies have been invented and refined for silicon (Si) processing because Si is the basic material of integrated circuits, the layouts are based on layer‐by‐layer approaches, making it difficult to realize three‐dimensional (3D) structures with complicated shapes normal to the planar surface (
Kanna Aoki   +7 more
openaire   +2 more sources

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