Results 161 to 170 of about 260 (218)

Single event upset in avionics

IEEE Transactions on Nuclear Science, 1993
Data from military/experimental flights and laboratory testing indicate that typical non-radiation-hardened 64 K and 256 K static random access memories (SRAMs) can experience a significant soft upset rate at aircraft altitudes due to energetic neutrons created by cosmic ray interactions in the atmosphere.
A. Taber, E. Normand
openaire   +1 more source

Design Optimization for Robustness to Single Event Upsets

24th IEEE VLSI Test Symposium, 2006
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustness of a logic gate is developed. This model is integrated with area and performance constraints into an optimization framework based on geometric programming for design space ...
Quming Zhou, Mihir R. Choudhury, Kartik Mohanram   +2 more
openaire   +1 more source

Estimating the effect of single-event upsets on microprocessors

2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014
Evaluating the impact of single-event upsets (SEUs) on complex VLSI circuits in general, and microprocessors in particular, requires an interdisciplinary approach, that includes soft error modeling, accelerated measurements, derating of the raw error rates, and specialized design tools.
Cristian Constantinescu, Srini Krishnamoorthy, Tuyen Nguyen   +2 more
openaire   +1 more source

A single event upset tolerant latch design

Microelectronics Reliability, 2018
Abstract This paper presents a single-event-upset tolerant latch design based on a redundant structure featuring four storage nodes (i.e. Quatro). The reference structure manifests single node upset issues when either of the two internal nodes is hit and observes a positive transient afterwards.
Haibin Wang, Xixi Dai, Yangsheng Wang, Issam Nofal, Li Cai, Zicai Shen, Wanxiu Sun, Jinshun Bi, Bo Li 0051, Gang Guo, Li Chen 0001, Sang H. Baeg   +11 more
openaire   +1 more source

Single Event Upset Testing

1988
Abstract : This report presents the results of an experimental program to characterize single event upset phenomena in selected bipolar memory devices irradiated with relativistic heavy ions. The principle objective was to determine the multibit upset rate at normal and parallel beam incidence angles.
Paul R. Measel, Jerry L. Wert, Dennis L. Oberg, Tommy L. Criswell   +3 more
openaire   +1 more source

Detecting Single Event Upsets in Embedded Software

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC), 2018
The past decade has seen explosive growth in the use of small satellites. Within this domain, there has been a growing trend to place more responsibility on the flight software (versus hardware) and an increasing adoption of consumer-grade microprocessors to satisfy this desire for increased processing capability while still minimizing size, weight ...
Robert G. Pettit IV, Aedan D. Pettit
openaire   +1 more source

Single Event Upset: Experimental

1997
The discussion in this chapter centers around the major single event upset (SEU) simulation sources. Their importance lies in the fact that simulation methods are one of the few means by which microcircuit susceptibility to SEU can be measured. These sources and source types are few in number, principally because of the somewhat unusual properties of ...
George C. Messenger, Milton S. Ash
openaire   +1 more source

Single-Event-Upset (SEU) Awareness in FPGA Routing

2007 44th ACM/IEEE Design Automation Conference, 2007
The majority of configuration bits affecting a design are devoted to FPGA routing configuration. We present a SEU-aware routing algorithm that provides significant reduction in bridging faults caused by SEUs. Depending on the routing architecture switches, for MCNC benchmarks, the number of care bits can be reduced between 13% and 19% on average with ...
Shahin Golshan, Elaheh Bozorgzadeh
openaire   +1 more source

Single event upset at gigahertz frequencies

IEEE Transactions on Nuclear Science, 1994
Single Event Upset (SEU) characteristics of a digital emitter coupled logic (ECL) device clocking at 0.5, 1, and 3.2 GHz and at temperatures of 5, 75, and 105/spl deg/ C are presented. The test technique is explained. Observations of two types of upsets, phase upsets at low Linear Energy Transfer (LETs) and amplitude upsets at high LETs are also ...
M. Shoga, K. Jobe, M. Glasgow, M. Bustamante, E. Smith, R. Koga   +5 more
openaire   +1 more source

Single-event upset in the PowerPC750 microprocessor

IEEE Transactions on Nuclear Science, 2001
Proton and heavy ion upset susceptibility has been measured individually for six types of storage elements in an advanced commercial processor, the PowerPC750, from two manufacturers: Motorola and IBM. Data on interfering program malfunctions was also collected. Compared to earlier PPC603e results, the upset susceptibility has decreased somewhat.
G.M. Swift, F.F. Fannanesh, S.M. Guertin, F. Irom, D.G. Millward   +4 more
openaire   +1 more source