Results 291 to 300 of about 1,200,056 (341)

Effects of Soft Error to System Reliability

2011 IEEE Workshops of International Conference on Advanced Information Networking and Applications, 2011
Soft errors on hardware could affect the reliability of computer system. To estimate system reliability, it is important to know the effects of soft errors to system reliability. This paper explores the effects of soft errors to computer system reliability. We propose a new approach to measure system reliability for soft error factor.
Lei Xiong, Qingping Tan, Jianjun Xu
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The concern for soft errors is not overblown

IEEE International Conference on Test, 2005., 2006
Single event upsets in logic paths are an emerging concern for computing systems built in advanced CMOS technologies. Upset rates for latches used in sequential circuits are increasing, and combinatorial circuit elements will also become a factor for future technology nodes.
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Soft Error Tolerant BILBO FF

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
This paper presents a construction of a flip-flop (FF) that works as a soft error tolerant FF in system operations and as a BILBO (Built-In Logic Block Observer) FF in manufacturing testing. The construction of the proposed FF is based on that of an existing soft error tolerant FF, namely a BISER (Built-In Soft Error Resilience) FF.
Kazuteru Namba, Hideo Ito
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Is the concern for soft-error overblown?

IEEE International Conference on Test, 2005., 2005
This article gives a general perspective regarding soft error and how to deal with it. Finally it the author gives his position on issues in solving soft error problems.
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A dynamic approach to tolerate soft errors

Cluster Computing, 2012
Dynamic implementation for software-based soft error tolerance method which can protect more types of codes can cover more soft errors. This paper explores soft error tolerance with dynamic software-based method. We propose a new dynamic software-based approach to tolerate soft errors.
Lei Xiong, Qingping Tan
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Modeling the Propagation of Soft Errors in Programs

Proceedings of the 2nd International Conference on Computer Science and Software Engineering, 2019
Due to the continuous growth of transistors in processors, the cloud computing paradigm and increasingly complex environment, soft errors, which are a category of typical transient errors, have become an urgent challenge in ground-level systems. To handle these errors, making clear the error propagation is the key step.
Lixing Xue, Zhan Zhang, Decheng Zou
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Enhancing I2C robustness to soft errors

2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), 2017
This paper proposes the use of a I2C Bus Monitor core able to perform data integrity verification activities, to signalize metrics about the quality of communications, to detect transient faults and permanent errors on the bus and to act on the devices connected to the bus for the recovery of such errors avoiding failures.
Vicente Carvalho, Fernanda Lima Kastensmidt   +1 more
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On Soft Error Immunity of Sequential Circuits

2010 19th IEEE Asian Test Symposium, 2010
With technology scaling, radiation-induced soft error has been a major concern even for mainstream enterprise applications. Since various hardening solutions impose significant costs in performance, area and power consumption, full soft error protection can hardly satisfy the multiple design goals simultaneously.
Dan Zhu, Tun Li, Sikun Li
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An Experimental Study of Soft Errors in Microprocessors

IEEE Micro, 2005
The issue of soft errors is an important emerging concern in the design and implementation of future microprocessors. The authors examine the impact of soft errors on two different microarchitectures: a DLX processor for embedded applications and a high-performance alpha processor.
Giacinto Paolo Saggese, Nicholas J. Wang, Zbigniew Kalbarczyk, Sanjay J. Patel, Ravishankar K. Iyer   +4 more
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Soft Error Hardening for Asynchronous Circuits

22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
As the devices are scaling down, the combinational logic will become susceptible to soft errors. The conventional soft error tolerant methods for soft errors on combinational logic do not provide enough high soft error tolerant capability with reasonably small performance penalty.
Weidong Kuang, Casto Manuel Ibarra, Peiyi Zhao   +2 more
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