Results 51 to 60 of about 10,430 (199)
Advanced Intelligent Systems, EarlyView.Large‐scale Hopfield neural networks (HNNs) for associative computing are implemented using vertical NAND (VNAND) flash memory. The proposed VNAND HNN with the asynchronous update scenario achieve robust image restoration performance despite fabrication variations, while significantly reducing chip area (≈117× smaller than resistive random‐access ...
Jin Ho Chang +4 more
wiley +1 more source
Low-power adiabatic 9T static random access memory
The Journal of Engineering, 2014 In this paper, the authors propose a novel static random access memory (SRAM) that employs the adiabatic logic principle. To reduce energy dissipation, the proposed adiabatic SRAM is driven by two trapezoidal-wave pulses.
Yasuhiro Takahashi +3 more
doaj +1 more source
A Flexible and Energy‐Efficient Compute‐in‐Memory Accelerator for Kolmogorov–Arnold Networks
Advanced Intelligent Systems, EarlyView.This article presents KA‐CIM, a compute‐in‐memory accelerator for Kolmogorov–Arnold Networks (KANs). It enables flexible and efficient computation of arbitrary nonlinear functions through cross‐layer co‐optimization from algorithm to device. KA‐CIM surpasses CPU, ASIC, VMM‐CIM, and prior KAN accelerators by 1–3 orders of magnitude in energy‐delay ...
Chirag Sudarshan +6 more
wiley +1 more source
Impact of body biasing on the retention time of gain-cell memories
The Journal of Engineering, 2013 Gain-cell-based embedded dynamic random-access memory (DRAMs) are a potential high-density alternative to mainstream static random-access memory (SRAM).
Pascal Meinerzhagen +3 more
doaj +1 more source
Chipmunk: A Systolically Scalable 0.9 mm${}^2$, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference [PDF]
, 2018 Recurrent neural networks (RNNs) are state-of-the-art in voice awareness/understanding and speech recognition. On-device computation of RNNs on low-power mobile and wearable devices would be key to applications such as zero-latency voice-based human ...
Benini, Luca +4 more
core +2 more sources
Field‐free programmable bipolar magnetic heterostructures for neuromorphic computing
InfoMat, EarlyView.Neuromorphic computing mimics the brain's efficiency, yet typical memristors lack biological synapses' dual signal control. We introduce a magnetic memristor enabling bidirectional, multi‐state modulation without external fields, validated in image feature extraction and neural clustering.
Yaping He +9 more
wiley +1 more source
The Journal of Engineering, 2019 With the shrinking feature sizes of static random access memory-based field programmable gate arrays (FPGAs), the occurrence probability of multiple-cell upsets (MCUs) in FPGAs continues to increase. This reduces the reliability of FPGAs.
Yue Li +3 more
doaj +1 more source
Near-Memory Address Translation
, 2017 Memory and logic integration on the same chip is becoming increasingly cost effective, creating the opportunity to offload data-intensive functionality to processing units placed inside memory chips. The introduction of memory-side processing units (MPUs)
Falsafi, Babak +2 more
core +1 more source
Small, EarlyView.Bio‐inspired computing offers a route to highly energy‐efficient artificial intelligence. The unique physical properties of two‐dimensional (2D) materials can further enhance such computing approaches. This perspective highlights recent developments in 2D materials‐based neuromorphic devices and discusses future opportunities for integrating such novel
Jin Feng Leong +9 more
wiley +1 more source
Device and circuit performance analysis of double gate junctionless transistors at L(g) = 18 nm
The Journal of Engineering, 2014 The design and characteristics of double-gate (DG) junctionless (JL) devices are compared with the DG inversion-mode (IM) field effect transistors (FETs) at 45 nm technology node with effective channel length of 18 nm. The comparison are performed at iso-
Chitrakant Sahu, Jawar Singh
doaj +1 more source