Results 71 to 80 of about 10,751 (237)
Crystal IO FETs feature (1) extremely low off current and (2) high on current. For ultralow‐power consumption, we are aiming at replacing conventional memories by crystal IO‐based memories and ultralow‐power ALUs using AiMC FETs in the subthreshold regime. This report will introduce the trend of these technologies.
Shunpei Yamazaki +27 more
wiley +1 more source
TrojanWhisper: Evaluating Pre-Trained LLMs to Detect and Localize Hardware Trojans
Existing Hardware Trojan (HT) detection methods face critical limitations: logic testing struggles with scalability, side-channel analysis requires golden reference chips, and formal verification suffers from state-space explosion.
Md Omar Faruque +3 more
doaj +1 more source
A novel system architecture for real-time low-level vision [PDF]
A novel system architecture that exploits the spatial locality in memory access that is found in most low-level vision algorithms is presented. A real-time feature selection system is used to exemplify the underlying ideas, and an implementation based on
Benedetti, A., Perona, P.
core
Field‐free programmable bipolar magnetic heterostructures for neuromorphic computing
Neuromorphic computing mimics the brain's efficiency, yet typical memristors lack biological synapses' dual signal control. We introduce a magnetic memristor enabling bidirectional, multi‐state modulation without external fields, validated in image feature extraction and neural clustering.
Yaping He +9 more
wiley +1 more source
EMERGING ARCHITECTURES FOR PROCESSOR-IN-MEMORY CHIPS: TAXONOMY AND IMPLEMENTATION
The emergence of PIM (processing-in-memory) die and Date-Centric systems (DCS) and near- data processing approach (NDP) has given rise to the need of developing architectural taxonomy for multi-core PNM (processing near memory) hardware with multi-level ...
A Lapshinsky Valery
doaj
Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism
Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher ...
Roman Golman +2 more
doaj +1 more source
Sensing–Computing Fusion in Machine Vision: A Review on Integrated Systems and Emerging Devices
The sensing–computing fusion of machine vision systems via complementary metal‐oxide‐semiconductor (CMOS) vision chips and emerging bio‐inspired devices is reviewed. CMOS vision chips are reviewed according to the physical relationships between sensors and processors, and the signal processing methods.
Zeyu Hu +5 more
wiley +1 more source
With the rapid development of various technologies, processing large amounts of data has become essential. To address this trend, various high-density and high-performance memories have emerged.
Ho-Sung Lee +4 more
doaj +1 more source
Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS
Many modern video processing pipelines rely on edge-aware (EA) filtering methods. However, recent high-quality methods are challenging to run in real-time on embedded hardware due to their computational load. To this end, we propose an area-efficient and
Benini, Luca +6 more
core +1 more source
A physics‐based compact model for Conductive‐Metal‐Oxide/HfOx ReRAM, accounting for ion dynamics, electronic conduction, and thermal effects, is presented. Accurate and versatile simulations of analog non‐volatile conductance modulation and memory state stabilization enable reliable circuit‐level studies, advancing the optimization of neuromorphic and ...
Matteo Galetta +9 more
wiley +1 more source

