Results 51 to 60 of about 546 (170)
Attention‐Based Spatial–Temporal Model for the Entire Indoor Space Temperature Estimation
This study proposes a novel attention‐based spatial–temporal model for indoor temperature estimation, which integrates positional encoding and an attention mechanism with a fully connected neural network. By jointly capturing temporal dynamics and spatial correlations, the model enables high‐resolution estimation of temperature fields across the entire
Goro Terumichi +3 more
wiley +1 more source
EMERGING ARCHITECTURES FOR PROCESSOR-IN-MEMORY CHIPS: TAXONOMY AND IMPLEMENTATION
The emergence of PIM (processing-in-memory) die and Date-Centric systems (DCS) and near- data processing approach (NDP) has given rise to the need of developing architectural taxonomy for multi-core PNM (processing near memory) hardware with multi-level ...
A Lapshinsky Valery
doaj
Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism
Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher ...
Roman Golman +2 more
doaj +1 more source
In‐Memory Continuous‐Time SAT Solver Based on Bidirectional 11‐T SRAM Macro
This article reported a continuous‐time (CT) Boolean satisfiability (SAT) problem solver using bidirectional 11T‐SRAM macro. The proposed system operates asynchronously using capacitor‐based gradient integration and maximizes the parallelism for SAT solving by in‐memory computing (IMC).
Dongseok Kwon +3 more
wiley +1 more source
With the rapid development of various technologies, processing large amounts of data has become essential. To address this trend, various high-density and high-performance memories have emerged.
Ho-Sung Lee +4 more
doaj +1 more source
Neuromorphic Denoising with Fully Analog Memristive In‐Memory Computing
This article borrows the concepts of episodic memory in human brains to experimentally implement a memristor‐based neuromorphic denoising process. A homogeneous memristor processing unit is experimentally demonstrated for both temporal storage and neural network computation, imitating the synapses in the human brain.
Daijing Shi +5 more
wiley +1 more source
Physical Unclonable Function Based on 3D‐NAND Flash Array Structure With Multi‐Chip Implementation
Physical unclonable function (PUF) based on a 3D‐NAND flash array is proposed, featuring a multi‐chip structure and a massive challenge–response pair (CRP) capacity. The presented utilizes intrinsic string current variations experimentally verified across eight fabricated 48 × 24 NAND flash arrays.
Hwiho Hwang +4 more
wiley +1 more source
Ultra-Low Power and Reliable SRAM for Systems-on-Chip [PDF]
The number of ubiquitous sensors has increased to more than double the human population and is expected to continue growing in the future. The pervasive use of sensors for applications such as personal healthcare and the Internet of Things (IoT) presents a growing sustainability challenge concerning the availability and accessibility of power sources ...
openaire +1 more source
Single-Chip Motes and SRAM PUF: Feasibility Study
Physically unclonable functions (PUFs) are used as low-cost cryptographic primitives that extract key material from manufacturing variabilities of a device. All microcontrollers have on-chip SRAM; the power-up state of SRAM cells provides one way of obtaining a random output. However, not every SRAM can be used as a PUF.
Faour, Sara +6 more
openaire +3 more sources
Monitoring time domain characteristics of Parkinson's disease using 3D memristive neuromorphic system. [PDF]
Siddique MAB, Zhang Y, An H.
europepmc +1 more source

