Binary-Weighted Neural Networks Using FeRAM Array for Low-Power AI Computing. [PDF]
Cho SM +5 more
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In-Sensor-Memory Computing for Post-Von Neumann Intelligence: A Perspective. [PDF]
Tang H, Yu N, Min P, Guo R, Zhang G.
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Subnanosecond flash memory enabled by 2D-enhanced hot-carrier injection. [PDF]
Xiang Y +7 more
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Concealable physical unclonable functions using vertical NAND flash memory. [PDF]
Park SH +5 more
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High-performance ternary logic circuits and neural networks based on carbon nanotube source-gating transistors. [PDF]
Zhu X +11 more
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Secure ECDSA SRAM-PUF Based on Universal Single/Double Scalar Multiplication Architecture. [PDF]
Zhang J +8 more
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Oxide semiconductor gain cell-embedded memory: materials and integration strategies for next generation on-chip memory. [PDF]
Chung SW, Yoon SH, Jeong JK.
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Efficient nonlinear function approximation in analog resistive crossbars for recurrent neural networks. [PDF]
Yang J +11 more
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A review of SPAD array chip design for direct time-of-flight LiDAR. [PDF]
Mo L, Huang S, Yang Y, Ren TL.
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A scalable neural network emulator with MRAM-based mixed-signal circuits. [PDF]
Lee J +10 more
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