Results 101 to 110 of about 10,751 (237)

Reducing bit flipping problems in SRAM physical unclonable functions for chip identification

, 2012
Susana Eiroa, Juan Antonio García Castro, Macarena C. Martínez‐Rodríguez, E. Tena, Piedad Brox, Iluminada Baturone   +5 more
openalex   +2 more sources

SoC including 2M-byte on-chip SRAM and analog circuits for Miniaturization and low power consumption

, 2017
Sung Hoon Park, Ju Eon Kim, Joon Hyun Baek   +2 more
openalex   +2 more sources

SRAM Has No Chill: Exploiting Power Domain Separation to Steal On-Chip Secrets [PDF]

Jubayer Mahmod, Matthew Hicks
openalex   +1 more source

Retraction Note: Hybrid on-chip soft computing model for performance evaluation of 6T SRAM cell using 45-nm technology [PDF]

Sivakumar Selvarasu, S. Saravanan
openalex   +1 more source

A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability

, 2008
Stefan Cosemans, Wim Dehaene, Francky Catthoor   +2 more
openalex   +2 more sources

A High-Precision Voltage-Quantization-Based Current-Mode Computing-in-Memory SRAM. [PDF]

Micromachines (Basel), 2023
Zhao R, Gong Z, Liu Y, Chen J.
europepmc   +1 more source

SEU-Hardened High-Speed SRAM Design with Self-Refresh and Adjacent-Bit Error Correction. [PDF]

Micromachines (Basel)
Li T, Tian J, Qi J.
europepmc   +1 more source

Low-Power Flexible Classifier Chip for Atrial Fibrillation Detection. [PDF]

IEEE Trans Circuits Syst Artif Intell
Sanchez J, Bhanushali SP, Sadasivuni S, Banerjee I, Sanyal A.   +4 more
europepmc   +1 more source

Current Sense Amplifiers for Embedded SRAM in High-Performance System-on-a-Chip Designs

, 2014
Bernhard Wicht
openalex   +2 more sources

Dual-V_T SRAM cells with full-swing single-ended bit line sensing for high-performance on-chip cache in 0.13 μm technology generation [PDF]

, 2000
Fatih Hamzaoglu, Yibin Te, A. Keshavarzi, Kevin Zhang, S. Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De   +7 more
openalex   +1 more source