High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits. [PDF]
Wu TT +14 more
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CoSP: Reconfigurable Metamaterial Inverse Design via Contrastive Pretrained Large Language Model. [PDF]
Yang S, Zhang Y, Zhao X, Tang Y, Dong K.
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Solution-Processed Vertically Stacked Complementary Organic Circuits with Inkjet-Printed Routing. [PDF]
Kwon J, Kyung S, Yoon S, Kim JJ, Jung S.
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Proceedings of the World Molecular Imaging Congress 2021, October 5-8, 2021: Late-Breaking Abstracts. [PDF]
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Power optimized quaternary logic circuits based on CNTFETs. [PDF]
Rupani A, Bansal D, Sharma K.
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ZnO composite nanolayer with mobility edge quantization for multi-value logic transistors. [PDF]
Lee L +17 more
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European Association of Nuclear Medicine October 20-23, 2021 Virtual. [PDF]
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Trade-off analysis between gm/ID and fT of GNR-FETs with single-gate and double-gate device structure. [PDF]
Ahmad MA, Kumar P, Mech BC, Kumar J.
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Abstracts des 73. Kongresses der Deutschen Gesellschaft für Urologie e. V. [PDF]
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PUFKEY: a high-security and high-throughput hardware true random number generator for sensor networks. [PDF]
Li D, Lu Z, Zou X, Liu Z.
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