Results 11 to 20 of about 2,469,367 (147)

Comparative Analysis of 6T, 7T, 8T, 9T, and 10T Realistic CNTFET Based SRAM [PDF]

Journal of Nanotechnology, 2017
CMOS technology below 10 nm faces fundamental limits which restricts its applicability for future electronic application mainly in terms of size, power consumption, and speed. In digital electronics, memory components play a very significant role.
Shital Joshi, Umar Alabawi
doaj   +2 more sources

VARIABILITY ANALYSIS OF 6T AND 7T SRAM CELL IN SUB-45NM TECHNOLOGY

International Islamic University Malaysia Engineering Journal, 2011
This paper analyses standard 6T and 7T SRAM (static random access memory) cell in light of process, voltage and temperature (PVT) variations to verify their functionality and robustness.
Aminul Islam, Mohd. Hasan
doaj   +2 more sources

A Novel Algorithm for Aspect Ratio Estimation in SRAM Design to Achieve High SNM, High Speed, and Low Leakage Power

IEEE Access
Performance optimization is a crucial aspect of enhancing the efficiency of electronic systems, and scaling is a primary method for achieving optimal performance while maintaining the integrity of system architecture.
Sanket M. Mantrashetti, Arunkumar P Chavan, Prakash Pawar, H. V. Ravish Aradhya, Omkar S. Powar   +4 more
doaj   +2 more sources

Device to Circuit Co-Design Utilizing High-Performance PEALD Indium-Gallium-Zinc Oxide Thin-Film Transistor Enabling Technology Node Scaling in Monolithic 3D Systems. [PDF]

Adv Sci (Weinh)
This article presents a holistic investigation of M3D‐compatible oxide semiconductor technology using PEALD‐fabricated IGZO TFTs, spanning device‐level characterization, TCAD Modeling, circuit design, and scaled‐node projections. It demonstrates high field‐effect mobility (up to 116.35 cm2 V−1·s−1), robust reliability (△VTH < 0.15 V), low variation ...
Wang W, Zhang T, Yuan Z, Peng H, Lan J, Li Z, Wu Y, Feng X, Lin L, Zhou F, Zhang P, Li Y.   +11 more
europepmc   +2 more sources

Intrinsic Dual-Phase Regulated GeSe₂ Nanoparticles Triggered by Ball-Milling Treatment for Photonic Multi-Valued Logic Circuits. [PDF]

Adv Sci (Weinh)
We report the solid‐state ball milling, a traditional, reliable, mass‐productive material processing, to prepare the air‐stable and dual‐phase GeSe2‐x nanoparticles with extended photodetection feasibility toward optical‐wavelength regions. We further display photonic multi‐valued logic (MVL) circuit through the employment of a hybrid PMMA/GeSe2‐x ...
Tsai AT, Wang CJ, Liao PC, Lue CS, Kuo CN, Thuan LVP, Hsiao PH, Kim CH, Chen CY.   +8 more
europepmc   +2 more sources

Simulation Analysis and Performance Comparison for the Memory Cells [PDF]

Journal of Electrical and Electronics Engineering, 2021
Leakage power dissipation is an important concern in ultra-deep submicron (ultra-DSM) regime because of the scaling of the technology node. The designing of the efficient memory cell is mandatory for the today’s portable applications.
SHARMA Vijay Kumar
doaj  

Large-Area Deposition of Highly Crystalline F4-Tetracyanoquinodimethane Thin Films by Molecular Step Templates. [PDF]

Small Sci
A molecular step template‐assisted method is proposed to overcome intrinsic limitations of low‐crystallinity nature of high‐mobility n‐type fluorinated tetracyanoquinodimethane (Fx‐TCNQ) molecules. This approach enables to yield of large‐area, fully connected, and highly crystalline F4‐TCNQ thin films, showing exceptionally high electron mobility of 2 ...
Qiu F, Deng W, Shi X, Ai D, Ren X, Dong A, Zhang X, Jie J.   +7 more
europepmc   +2 more sources

Stability Improvement of an Efficient Graphene Nanoribbon Field-Effect Transistor-Based SRAM Design

Journal of Nanotechnology, 2020
The development of the nanoelectronics semiconductor devices leads to the shrinking of transistors channel into nanometer dimension. However, there are obstacles that appear with downscaling of the transistors primarily various short-channel effects ...
Mathan Natarajamoorthy, Jayashri Subbiah, Nurul Ezaila Alias, Michael Loong Peng Tan   +3 more
doaj   +1 more source

Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region

International Journal of Reconfigurable Computing, 2015
The paper presents a novel 8T SRAM cell with access pass gates replaced with modified PMOS pass transistor logic. In comparison to 6T SRAM cell, the proposed cell achieves 3.5x higher read SNM and 2.4x higher write SNM with 16.6% improved SINM (static ...
Priya Gupta, Anu Gupta, Abhijit Asati
doaj   +1 more source

STATIC NOISE MARGIN OPTIMIZED 11NM SHORTED-GATE AND INDEPENDENT-GATE LOW POWER 6T FINFET SRAM TOPOLOGIES

, 2020
This paper investigates the leakage current, static noise margin (SNM), delay and energy consumption of a 6 transistor FinFET based static random-access memory (SRAM) cell due to the variation in design and operating parameters of the SRAM cell. The SRAM
Eugene John, Dusten Vernor, Santosh Koppa   +2 more
core   +1 more source