Results 41 to 50 of about 304,009 (317)
Investigating SRAM PUFs in large CPUs and GPUs [PDF]
, 2015 Physically unclonable functions (PUFs) provide data that can be used for cryptographic purposes: on the one hand randomness for the initialization of random-number generators; on the other hand individual fingerprints for unique identification of ...
Bernstein, Daniel J. +2 more
core +5 more sources
Si/SiGe Tunneling Static Random Access Memories [PDF]
ECS Transactions, 2012 One of the limits to the low power operation of MOSFET devices is the minimum subthreshold slope defined by the p-n junctions in the devices. A tunneling static random access memory is demonstrated with a supply voltage of 0.42 V, well below the minimum supply voltage that MOSFET technology is capable of delivering.
Gary Ternent, Douglas J. Paul
openaire +1 more source
Transparent code authentication at the processor level [PDF]
, 2009 The authors present a lightweight authentication mechanism that verifies the authenticity of code and thereby addresses the virus and malicious code problems at the hardware level eliminating the need for trusted extensions in the operating system.
A.O. Durahim +32 more
core +2 more sources
Review of Physically Unclonable Functions (PUFs): Structures, Models, and Algorithms
Frontiers in Sensors, 2022 Physically unclonable functions (PUFs) are now an essential component for strengthening the security of Internet of Things (IoT) edge devices. These devices are an important component in many infrastructure systems such as telehealth, commerce, industry,
Fayez Gebali, Mohammad Mamun
doaj +1 more source
The impact of random doping effects on CMOS SRAM cell [PDF]
, 2004 The SRAM has a very constrained cell area and is consequently sensitive to the intrinsic parameter fluctuations ubiquitous in decananometer scale MOSFETs.
Asenov, A., Cheng, B., Roy, S.
core +1 more source
Using shared-data localization to reduce the cost of inspector-execution in unified-parallel-C programs [PDF]
, 2016 Programs written in the Unified Parallel C (UPC) language can access any location of the entire local and remote address space via read/write operations. However, UPC programs that contain fine-grained shared accesses can exhibit performance degradation.
Alvanos, Michail +4 more
core +2 more sources
Radiation Hardened Read-Stability and Speed Enhanced SRAM for Space Applications
Applied SciencesWith the advancement of CMOS technology, the susceptibility of SRAM to single node upset (SNU), double node upset (DNU), and multiple node upset (MNU) induced by radiation has increased.
Woo Chang Choi, Sung-Hun Jo
doaj +1 more source
Long‐term hippocampal alterations and cognitive impairment in a murine model of surgical sepsis
FEBS Open Bio, EarlyView.Using a mouse model of surgical sepsis, we tested long‐term memory and analyzed the transcriptome of single cells isolated from the hippocampus. Survivor mice showed worse memory, loss of certain brain cell subpopulations, and abnormal immune cell activity—suggesting that post‐sepsis brain alterations may be linked to cognitive deficits.
Dong Seong Cho +4 more
wiley +1 more source
Self-checking on-line testable static RAM [PDF]
, 1993 This is a fault-tolerant random access memory for use in fault-tolerant computers. It comprises a plurality of memory chips each comprising a plurality of on-line testable and correctable memory cells disposed in rows and columns for holding individually
Chau, Savio N., Rennels, David A.
core +1 more source
Intelligent intrusion detection in low power IoTs [PDF]
, 2016 Security and privacy of data are one of the prime concerns in today’s Internet of Things (IoT). Conventional security techniques like signature-based detection of malware and regular updates of a signature database are not feasible solutions as they ...
Ahmadinia, Ali +3 more
core +1 more source