Results 21 to 30 of about 30,204 (293)
Performance Analysis Of SRAM and Dram in Low Power Application [PDF]
E3S Web of Conferences, 2023 All electronic systems must function quickly in the current environment, and 80 percent of electronic chips have memory components. SRAM (Static Random Access Memory) has thus become a major key component in many VLSI Chips in order to reduce the size of
Yuvaraj S. +5 more
doaj +1 more source
March AB, March AB1: new March tests for unlinked dynamic memory faults [PDF]
, 2005 Among the different types of algorithms proposed to test static random access memories (SRAMs), March tests have proven to be faster, simpler and regularly structured. New memory production technologies introduce new classes of faults usually referred to
Di Natale, Giorgio +9 more
core +1 more source
Ultra-low leakage static random access memory design [PDF]
, 2023 An ultra-low leakage static random-access memory (SRAM) cell structure with 8 transistors is proposed in this paper. Compared to the 6T SRAM and other existing 8T SRAM cells, leakage power of the proposed cell in hold mode reduced significantly.
Mohd. Masood Ahmad +3 more
core +1 more source
Impact of different parameters on the static random access memory under the total ionizing dose
Fushe yanjiu yu fushe gongyi xuebao, 2023 The effect of the total ionizing dose (TID) on the static random access memory (SRAM) is conducted on the 60Co radioactive source in the China Institute of Atomic Energy. The study explores the influence of the device process size, dose rate, temperature
ZHANG Fuqiang +9 more
doaj +1 more source
A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs [PDF]
, 2006 Among the different types of algorithms proposed to test static random access memories (SRAMs), march tests have proven to be faster, simpler and regularly structured.
Di Natale, Giorgio +4 more
core +1 more source
A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process
Nanoscale Research Letters, 2017 This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application.
Meng-Yin Hsu +4 more
doaj +1 more source
March Test Generation Revealed [PDF]
, 2008 Memory testing commonly faces two issues: the characterization of detailed and realistic fault models and the definition of time-efficient test algorithms.
Di Natale, Giorgio +5 more
core +1 more source
Active and Passive Electronic Components, 2023 Combining with a static random-access memory (SRAM) and resistive memory (RRAM), an improved 8T2R nonvolatile SRAM (nvSRAM) memory cell is proposed in this study. With differential mode, a pair of 1T1R RRAM is added to 6T SRAM storage node. By optimizing
Jiayu Yin, Wenli Liao, Chengying Chen
doaj +1 more source
Influence of parasitic capacitance variations on 65 nm and 32 nm predictive technology model SRAM core-cells [PDF]
, 2008 The continuous improving of CMOS technology allows the realization of digital circuits and in particular static random access memories that, compared with previous technologies, contain an impressive number of transistors.
Stefano Di Carlo +7 more
core +1 more source
A 22n March Test for Realistic Static Linked Faults in SRAMs [PDF]
, 2006 Linked faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and makes test algorithm design a very complex task.
Di Natale, Giorgio +9 more
core +1 more source