Results 31 to 40 of about 30,204 (293)
Technology and layout-related testing of static random-access memories [PDF]
Journal of Electronic Testing, 1994 Static random-access memories (SRAMs) exhibit faults that are electrical in nature. Functional and electrical testing are performed to diagnose faulty operation. These tests are usually designed from simple fault models that describe the chip interface behavior without a thorough analysis of the chip layout and technology.
Chakraborty, Kanad, Mazumder, Pinaki
openaire +2 more sources
Sensors, 2023 This paper introduces an n-type pseudo-static gain cell (PS-nGC) embedded within dynamic random-access memory (eDRAM) for high-speed processing-in-memory (PIM) applications.
Subin Kim, Ingu Jeong, Jun-Eun Park
doaj +1 more source
Automatic March tests generation for static and dynamic faults in SRAMs [PDF]
, 2005 New memory production modern technologies introduce new classes of faults usually referred to as dynamic memory faults. Although some hand-made March tests to deal with these new faults have been published, the problem of automatically generate March ...
Di Natale, Giorgio +9 more
core +1 more source
Effects of total ionizing dose on transient ionizing radiation upset sensitivity of 40–180 nm SRAMs
AIP Advances, 2022 Effects of total ionizing dose (TID) on the transient radiation upset sensitivity of commercial static random access memories (SRAMs) were investigated.
Junlin Li +8 more
doaj +1 more source
Combination-Encoding Content-Addressable Memory With High Content Density
IEEE Access, 2019 Recently, resistance switch-based content-addressable memory (RCAM) has been proposed as an alternative to the mainstream static random-access memory-based CAM because of its high integration potential and low static energy consumption. However, RCAM has
Guhyun Kim +5 more
doaj +1 more source
A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs [PDF]
, 2009 The continues improvement of manufacturing technologies allows the realization of integrated circuits containing an ever increasing number of transistors. A major part of these devices is devoted to realize SRAM blocks.
Salvador Manich +12 more
core +1 more source
, 2023 This paper presents a reconfigurable negative bit line collapsed supply (RNBLCS) write driver circuit for the 9T Schmitt trigger-based static random-access memory (SRAM) cell (9T-ST), significantly improving write performance for real-time memory ...
Chokkakula Ganesh +5 more
core +2 more sources
Review of Physically Unclonable Functions (PUFs): Structures, Models, and Algorithms
Frontiers in Sensors, 2022 Physically unclonable functions (PUFs) are now an essential component for strengthening the security of Internet of Things (IoT) edge devices. These devices are an important component in many infrastructure systems such as telehealth, commerce, industry,
Fayez Gebali, Mohammad Mamun
doaj +1 more source
Optimization of Resistance Load in 4T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor [PDF]
, 2018 This study explores optimization of resistance load (R-Load) of four silicon nanowire transistor (SiNWT)-based static random-access memory (SRAM) cell.
Hashim, Yasir, Yasir Hashim
core +1 more source
Software-Based Self-Test of Set-Associative Cache Memories [PDF]
, 2011 Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during in-system tests. This paper presents a procedure to transform traditional march tests into software-based self-test programs for set ...
Stefano Di Carlo +5 more
core +1 more source