Results 11 to 20 of about 30,204 (293)

Static random‐access memory with embedded arithmetic logic units for in‐memory computing and ternary content addressable memory operation

open access: yesElectronics Letters, 2022
In‐memory computing (IMC) is a novel computing architecture that presents considerable potential in solving the data transmission and energy consumption problems faced by the von Neumann architecture.
Zhiting Lin   +5 more
doaj   +2 more sources

Si/SiGe Tunneling Static Random Access Memories [PDF]

open access: yesECS Transactions, 2012
One of the limits to the low power operation of MOSFET devices is the minimum subthreshold slope defined by the p-n junctions in the devices. A tunneling static random access memory is demonstrated with a supply voltage of 0.42 V, well below the minimum supply voltage that MOSFET technology is capable of delivering.
Gary Ternent, Douglas J. Paul
openaire   +2 more sources

X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

open access: yesIEEE Transactions on Circuits and Systems I: Regular Papers, 2018
This article has been accepted in a future issue of IEEE Transactions on Circuits and Systems-I: Regular ...
Amogh Agrawal   +2 more
exaly   +3 more sources

DESIGN AND ANALYSIS OF STATIC RANDOM ACCESS MEMORY BY SCHMITT TRIGGER TOPOLOGY FOR LOW VOLTAGE APPLICATIONS [PDF]

open access: yesJournal of Engineering Science and Technology, 2016
Aggressive scaling of transistor dimensions with each technology generation has resulted an increased integration density and improved device performance at the expense of increased leakage current.
RUKKUMANI V., DEVARAJAN N.
doaj   +1 more source

Performance evaluation of SRAM design using different field effect transistors [PDF]

open access: yesE3S Web of Conferences, 2023
SRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it.
C. Venkataiah   +5 more
doaj   +1 more source

Security and Privacy of Blockchain-Based Single-Bit Cache Memory Architecture for IoT Systems

open access: yesIEEE Access, 2022
This paper provides an overview of blockchain technology’s security and privacy features, as well as an overview of IoT-based cache memory and single-bit six transistor static random-access memory cell sense amplifier architecture.
Reeya Agrawal   +3 more
doaj   +1 more source

Design of High-Speed, Low-Power Sensing Circuits for Nano-Scale Embedded Memory

open access: yesSensors, 2023
This paper comparatively reviews sensing circuit designs for the most widely used embedded memory, static random-access memory (SRAM). Many sensing circuits for SRAM have been proposed to improve power efficiency and speed, because sensing operations in ...
Sangheon Lee   +2 more
doaj   +1 more source

Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories

open access: yesIEEE Access, 2022
In New Space, the need for reduced cost, higher performance, and more prompt delivery plans in radiation-harsh environments have motivated spacecraft designers to use Commercial-Off-The-Shelf (COTS) memories and emerging technology devices.
Golnaz Korkian   +9 more
doaj   +1 more source

An 8kb RRAM-Based Nonvolatile SRAM with Pre-Decoding and Fast Storage/Restoration Time

open access: yesApplied Sciences, 2022
Combining the advantages of low-power consumption of static random access memory (SRAM) with high stability and nonvolatile of resistive memory (RRAM), an improved 8T2R nonvolatile SRAM (nvSRAM) memory cell was proposed in this paper.
Jiayu Yin   +4 more
doaj   +1 more source

Memory Fault Simulator for Static-Linked Faults [PDF]

open access: yes, 2006
Static linked faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and makes test algorithm design and validation a very complex task.
Di Natale, Giorgio   +9 more
core   +1 more source

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