Results 81 to 90 of about 17,344,745 (166)

Finfet sram cells with asymmetrical bitline access transistors for enhanced read stability [PDF]

, 2015
Degraded data stability, weaker write ability, and increased leakage power consumption are the primary concerns in scaled static random-access memory (SRAM) circuits.
Kursun, V., Kursun, Volkan, Jiao, H., Salahuddin, Shairfe Muhammad, Salahuddin, S.M., Jiao, Hailong   +5 more
core   +1 more source

Efficient turbo product code decoder with Build‐In SRAM‐based transpose memory

Electronics Letters
Turbo product codes (TPCs) have been widely used for bit error correction in high‐speed applications such as data storage. This letter introduces an efficient hard‐input hard‐output iterating TPC decoder module. A transpose memory utilizing static random
Jianjun Luo, Xiaoyu Xu, Yifan Shen, Boming Huang, Wenkui Wang   +4 more
doaj   +1 more source

A 28-nm 32Kb SRAM For Low-VMIN Applications Using Write and Read Assist Techniques [PDF]

Radioengineering, 2017
In this paper new write and read assist techniques, reduced coupling signal negative bitline (RCS-NBL) and low power disturbance noise reduction (LP-DNR) of 6T static random-access memory (SRAM) to improve its minimal supply voltage (VMIN), have been ...
S. Kumar, K. Saha, H. Gupta
doaj  

Improving Energy-Efficiency in Dynamic Memories Through Retention Failure Detection

IEEE Access, 2019
A gain-cell embedded DRAM (GC-eDRAM) is an attractive logic-compatible alternative to the conventional static random access memory (SRAM) for the implementation of embedded memories, as it offers higher density, lower leakage, and two-ported operation ...
Robert Giterman, Roman Golman, Adam Teman   +2 more
doaj   +1 more source

A CNTFET based process variation resilient SRAM design for stable low power and half select free operation

Scientific Reports
Static random-access memory (SRAM) design at nanoscale dimensions faces critical challenges arising from degraded stability, excessive power dissipation, and heightened sensitivity to process variations, particularly under low-voltage operation.
Shams Ul Haq, Alireza Aminzadeh, Abdolreza Darabi, Erfan Abbasian, Owais Ahmad Shah, Vakkalakula Bharath Sreenivasulu   +5 more
doaj   +1 more source

SRAM-PUF Key Extraction Method and Performance Analysis Based on RS and BCH Codes [PDF]

Jisuanji gongcheng
The Physical Unclonable Function (PUF) is a unique and nonreplicable physical fingerprint formed by random deviations during chip manufacturing that can be used to identify individual chips.
Yu ZHOU, Zongguang YU
doaj   +1 more source

A Novel Algorithm for Aspect Ratio Estimation in SRAM Design to Achieve High SNM, High Speed, and Low Leakage Power

IEEE Access
Performance optimization is a crucial aspect of enhancing the efficiency of electronic systems, and scaling is a primary method for achieving optimal performance while maintaining the integrity of system architecture.
Sanket M. Mantrashetti, Arunkumar P Chavan, Prakash Pawar, H. V. Ravish Aradhya, Omkar S. Powar   +4 more
doaj   +1 more source

SRAM for IoT Applications in 0.6um CMOS

, 2020
This article presents the detailed design and implementation of a Static Random-Access Memory (SRAM) in CMOS technology. The data access (read/write) is done through Serial Peripheral Interface (SPI), an industry-standard serial protocol.
Mohapatra, Subhra Sutapa, Mrudula, Prachi, kumari, Sneha, Nath, Manamohan, Sarangi, Santunu, Rout, Saroj, Singh, Aditya   +6 more
core   +1 more source

A 0.5-V Six-Transistor Static Random Access Memory with Ferroelectric-Gate Field Effect Transistors

, 2010
A 0.5 V six-transistor static random access memory (6T-SRAM) with ferroelectric-gate field-effect-transistors (Fe-FETs) is proposed and experimentally demonstrated for the first time. During the read and the hold, the threshold voltage (V
Shuhei Tanakamaru, Teruyoshi Hatanaka, Mitsue Takahashi, Kousuke Miyaji, Shigeki Sakai, Ryoji Yajima, Ken Takeuchi   +6 more
core   +1 more source

Study in Design of 32 X 4Bit Static Random Access Memory (SRAM)

, 2007
Access is limited to UniMAP community.Study in design Static Random Access Memory (SRAM) using Mentor Graphic and simulation process with Eldo simulator.
Nor Bashariah Muhamad Bakhtiar
core