Results 61 to 70 of about 17,344,745 (166)
Design Of 1K Asynchronous Static Random Access Memory Using 0.35 Micron Complementary Metal Oxide Semiconductor Technology [PDF]
, 2005 Static Random Access Memory (SRAM) is a high speed semiconductor memory which is widely used as cache memory in microprocessors and microcontrollers, telecommunication and networking devices.
Yeong, Tak Nging
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Artificial Intelligence for Engineering, EarlyView.NanoSentry, a sub‐50 KiB unified architecture for multi‐domain prognostics, matches or outperforms models 4.5× $4.5\times $ larger across turbofan, battery, and bearing benchmarks while reducing end‐of‐life prediction error up to 5.8× $5.8\times $. Physical STM32H7 deployment confirms sub‐3 ms inference and up to 26 KiB peak SRAM without quantisation ...
Naem Azam Chowdhury +4 more
wiley +1 more source
Analysis of 6T SRAM Cell in Different Technologies
, 2017 Static random access memory (SRAM) is an important component of embedded cache memory of handheld digital devices. SRAM has become major data storage device due to its large storage density and less time to access. Exponential growth of low power digital
Siba Kumar Panda, Subhashree Rath
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Design and analysis of single- ended robust low power 8T SRAM cell
MATEC Web of Conferences, 2016 This paper is based on the observation of 8T single ended static random access memory (SRAM) and two techniques for reducing the sub threshold leakage current, power consumption are examined.
Gupta Neha, Pahuja Hitesh
doaj +1 more source
On‐Chip Learning With Crossbar Arrays for Adaptive Edge Intelligence
Advanced Computing, Volume 1, Issue 1, December 2026.Memristor crossbar arrays implemented on chip combines memory, computation, and learning. They allow for adapting the neural weights using the incoming sensor data. This architecture reduces data movement leading to low‐latency, energy‐efficient intelligence in edge while being reliability‐aware co‐design across devices, circuits, and algorithms that ...
Alex James
wiley +1 more source
Triple‐Level Content‐Addressable Vertical NAND Flash Memory
Advanced Science, Volume 13, Issue 61, 3 November 2026.Commercial triple‐level‐cell V‐NAND flash memory is transformed into a compact content‐addressable memory by directly exploiting its eight threshold‐voltage states. A parity‐split search scheme preserves storage density while enabling reliable multi‐level and don't‐care matching. Parallel word‐line search delivers up to 24‐fold higher throughput and 54.
Sung‐Ho Park +8 more
wiley +1 more source
A fast half-subtractor using 8T static random access memory for in-memory computation [PDF]
The existing system for computation completely incorporates Von-Neumann architecture which has limitations with respect to its memory, parallelism and power constraints. This has affected the efficiency of the computing system.
Shylashree, Nagaraja +4 more
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M3D-MDA: New scratchpad memory for enhancing GPU performance and energy efficiency
ETRI JournalApplications in various fields, such as deep learning and scientific computing, naturally exhibit data access patterns along both the row and column dimensions of static random access memory (SRAM).
Cong Thuan Do
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A Novel Approach to Design SRAM Cells for Low Leakage and Improved Stability
Journal of Low Power Electronics and Applications, 2018 The semiconductor electronic industry is advancing at a very fast pace. The size of portable and handheld devices are shrinking day by day and the demand for longer battery backup is also increasing. With these requirements, the leakage power in stand-by
Tripti Tripathi +2 more
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Concurrency and Computation: Practice and Experience, Volume 38, Issue 21, November 2026.ABSTRACT A lightweight neural‐network classifier was developed to assign surface‐water samples to the five quality classes established by Brazil's environmental standard CONAMA 357/2005. The study used a 2018 dataset from SEMASA‐Itajaí comprising 8928 hourly observations of pH, turbidity, apparent color, and local rainfall.
Eduardo C. Vicente +3 more
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