Results 31 to 40 of about 86,211 (240)

Low-Power OR Logic Ferroelectric In-Situ Transistor Based on a CuInP₂S₆/MoS₂ Van Der Waals Heterojunction

Nanomaterials, 2021
Due to the limitations of thermodynamics, the Boltzmann distribution of electrons hinders the further reduction of the power consumption of field-effect transistors.
Kun Yang, Shulong Wang, Tao Han, Hongxia Liu   +3 more
doaj   +1 more source

Variation Resilient Adaptive Controller for Subthreshold Circuits

, 2009
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for power-limited applications. For this design technique to gain widespread adoption, one of the most pressing concerns is how to improve the robustness of ...
B. Mishra, Zwolinski, Mark, B.M. Al-Hashimi, Mishra, B, M. Zwolinski, Al-Hashimi, Bashir   +5 more
core   +1 more source

Analysis of the 5 iron golf swing when hitting for maximum distance [PDF]

, 2011
Most previous research on golf swing mechanics has focused on the driver club. The aim of this study was to identify the kinematic factors that contribute to greater hitting distance when using the 5 iron club.
Haahr, M., Dickson, J., Healy, Aoife, O'Connor, Noel E., Smeaton, A.F., Moran, Kieran, Kelly, P., Aoife Healy, Cillian Hurley, Kelly, Philip, Moran, Kieran A., Healy, A., Philip Kelly, Hurley, Cillian, Alan F. Smeaton, O'Connor, N.E., Noel E. O'Connor, Dickson, Jane, Mads Haahr, Moran, K.A., Nachiappan Chockalingam, Hurley, C., Haahr, Mads, Smeaton, Alan F., CHOCKALINGAM, Nachiappan, Kieran A. Moran, O\u27Connor, Noel E., Jane Dickson   +27 more
core   +2 more sources

Investigation of Channel Doping Concentration and Reverse Boron Penetration on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode FETs

IEEE Journal of the Electron Devices Society, 2018
In this paper, the influence of channel doping concentration and reverse boron penetration on p-type Pi-gate (PG) poly-Si junctionless accumulation mode (JAM) FETs has been experimentally investigated and discussed. Effective carrier concentration (Neff)
Dong-Ru Hsieh, Yi-De Chan, Po-Yi Kuo, Tien-Sheng Chao   +3 more
doaj   +1 more source

A temperature dependent analytical model & performance evaluation of triple-material dielectric-pocket gate-all-around MOSFET

Discover Applied Sciences
In current article, an analytical model of a Triple-Material Dielectric-Pocket Gate-All-Around (TM-DP-GAA) MOSFET has been presented for elevated temperature conditions. The numerical model of surface potential has been developed for temperatures ranging
Neeraj Gupta, Rashmi Gupta, Rekha Yadav, Prashant Kumar, Lalit Rai   +4 more
doaj   +1 more source

Could the negative capacitance effect be used in field-effect transistors with a ferroelectric gate?

Фізика і хімія твердого тіла, 2022
We analyze the electric potential and field, polarization and charge, and differential capacitance of a silicon metal-oxide-ferroelectric field effect transistor (MOSFET), in which a gate insulator consists of thin layers of dielectric SiO2 and weak ...
E. A. Eliseev, A. N. Morozovska, L. P. Yurchenko, M. V. Strikha   +3 more
doaj   +1 more source

Simultaneous Enhancement of Performance and Stability in Dual‐Gate a‐IGZO Thin‐Film Transistors via Single‐Step Laser Annealing for Capacitor‐Less DRAM

Advanced Functional Materials, EarlyView.
A single‐step laser annealing strategy is presented for dual‐gate a‐IGZO TFTs. The steep thermal gradient induces graded oxygen doping in the channel and simultaneous WOx removal at the contacts, enabling concurrent interface and contact engineering.
Sihyeon Kwon, Junil Kim, Geuntae Park, Minseok Kim, Woohyun Hwang, Wanki Kim, Daewon Ha, Byeongmoon Lee, Jae Eun Jang, Hyuk‐Jun Kwon   +9 more
wiley   +1 more source

High drain field impact ionization transistors as ideal switches

Nature Communications
Impact ionization effect has been demonstrated in transistors to enable sub-60 mV dec−1 subthreshold swing. However, traditionally, impact ionization in silicon devices requires a high operation voltage due to limited electrical field near the device ...
Baowei Yuan, Zhibo Chen, Yingxin Chen, Chengjie Tang, Weiao Chen, Zengguang Cheng, Chunsong Zhao, Zhaozhao Hou, Qiang Zhang, Weizhuo Gan, Jiacheng Gao, Jiale Wang, Jeffrey Xu, Guangxi Hu, Zhenhua Wu, Kun Luo, Mingyan Luo, Yuanbo Zhang, Zengxing Zhang, Shisheng Xiong, Chunxiao Cong, Wenzhong Bao, Shunli Ma, Jing Wan, Peng Zhou, Ye Lu   +25 more
doaj   +1 more source

Investigation on Tunneling-based Ternary CMOS with Ferroelectric-Gate Field Effect Transistor Using TCAD Simulation

Applied Sciences, 2020
Ternary complementary metal-oxide-semiconductor technology has been spotlighted as a promising system to replace conventional binary complementary metal-oxide-semiconductor (CMOS) with supply voltage (VDD) and power scaling limitations.
Kitae Lee, Sihyun Kim, Daewoong Kwon, Byung-Gook Park   +3 more
doaj   +1 more source

Subthreshold swing model using scale length for sub-10 nm junction-based double-gate MOSFETs [PDF]

, 2020
We propose an analytical model for subthreshold swing using scale length for sub-10 nm double gate (DG) MOSFETs. When the order of the calculation for the series type potential distribution is increased it is possible to obtain accuracy, but there is a ...
Jung, Hakkee, Hakkee Jung
core   +1 more source