Results 61 to 70 of about 2,685 (210)

Demonstration of Steep Switching Behavior Based on Band Modulation in WSe₂ Feedback Field-Effect Transistor

Nanomaterials
Feedback field-effect transistors (FBFETs) have been studied to obtain near-zero subthreshold swings at 300 K with a high on/off current ratio ~1010. However, their structural complexity, such as an epitaxy process after an etch process for a Si channel ...
Seung-Mo Kim, Jae Hyeon Jun, Junho Lee, Muhammad Taqi, Hoseong Shin, Sungwon Lee, Haewon Lee, Won Jong Yoo, Byoung Hun Lee   +8 more
doaj   +1 more source

Ferroelectricity of HfZrO₂ in Energy Landscape With Surface Potential Gain for Low-Power Steep-Slope Transistors

IEEE Journal of the Electron Devices Society, 2015
The corresponding energy landscape and surface potential are deduced from the experimental ferroelectricity of HfZrO2 (HZO) for low-power steep-slope transistor applications.
Min Hung Lee, Y.-T. Wei, C. Liu, J.-J. Huang, Ming Tang, Yu-Lun Chueh, K.-Y. Chu, Miin-Jang Chen, Heng-Yuan Lee, Yu-Sheng Chen, Li-Heng Lee, Ming-Jinn Tsai   +11 more
doaj   +1 more source

Stepwise internal potential jumps caused by multiple-domain polarization flips in metal/ferroelectric/metal/paraelectric/metal stack

Nature Communications, 2020
Negative capacitance (NC) effects that could allow steep subthreshold swing (SS) in field-effect transistors (FETs) are still controversially discussed.
Xiuyan Li, Akira Toriumi
doaj   +1 more source

Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration

Advanced Electronic Materials, EarlyView.
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song, Chenxi Yu, Shangze Li, Dijiang Sun, Jiajia Zhang, Haotong Zhu, Xiaomin Xiao, Xionghao Qin, Xiaoyan Liu, Xing Zhang, Jinfeng Kang   +10 more
wiley   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Multi‐Vth IGZO FETs Enabled by Continuous‐wave Laser Scanning Annealing for Low Thermal Budget 3D Integration

Advanced Electronic Materials, EarlyView.
A novel strategy is used to fabricate multi‐threshold‐voltage (multi‐Vth) IGZO FETs via continuous‐wave laser scanning annealing (CW‐LSA). By tuning the laser power and scan speed, low, standard, and high Vth values of 0.22, 0.42, and 0.62 V, respectively, were achieved on a single wafer with excellent uniformity (coefficient of variation: 2.17%–6.61%).
Jun‐Hyeok Choi, Kiyung Kim, Hyeon‐Seok Shin, Uigwan Shin, Byeong Gwan Kim, Jae Hyeon Jun, Joon Kim, Yoonyoung Chung, Byoung Hun Lee   +8 more
wiley   +1 more source

Gate engineering solutions to mitigate short channel effects in a 20 nm MOSFET

e-Prime: Advances in Electrical Engineering, Electronics and Energy
This work presents a promising approach to addressing scaling challenges in advanced MOSFET technology. It proposes a novel MOSFET structure designed to enhance electrical performance by introducing asymmetry in the gate dielectric thickness.
Ahmed S. Al-Jawadi, Mohammad Tariq Yaseen, Qais Thanon Algwari   +2 more
doaj   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

Advanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Brojogopal Sapui, Sara Mannaa, Ian O'Connor, Violetta Sessi, Peter Javorka, Thomas Mikolajick, Jens Trommer   +10 more
wiley   +1 more source

High performance MoS2 TFT using graphene contact first process

AIP Advances, 2017
An ohmic contact of graphene/MoS2 heterostructure is determined by using ultraviolet photoelectron spectroscopy (UPS). Since graphene shows a great potential to replace metal contact, a direct comparison of Cr/Au contact and graphene contact on the MoS2 ...
Chih-Shiang Chang Chien, Hsun-Ming Chang, Wei-Ta Lee, Ming-Ru Tang, Chao-Hsin Wu, Si-Chen Lee   +5 more
doaj   +1 more source

Analysis of Subthreshold Swing for Oxide Thickness and Doping Distribution in DGMOSFET [PDF]

The Journal of the Korean Institute of Information and Communication Engineering, 2011
In this paper, the relationship of potential and charge distribution in channel for double gate(DG) MOSFET has been derived from Poisson's equation using Gaussian function. The relationship of subthreshold swing and oxide thickness has been investigated according to variables of doping distribution using Gaussian function, i.e.
openaire   +1 more source