Results 71 to 80 of about 5,282 (241)

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

open access: yesAdvanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez   +12 more
wiley   +1 more source

Improvements in reliability and radio frequency performance of junctionless tunnelling field effect transistor using p+ pocket and metal strip

open access: yesIET Circuits, Devices and Systems, 2023
In this article, a new p+ pocket stacked gate oxide junctionless tunnelling field effect transistor (junction less tunnelling field effect transistor (JLTFET)) which has metal strip in gate oxide layer is proposed for analogue/RF circuit applications ...
Alireza Zirak
doaj   +1 more source

Aging and Electrical Stability of DNTT Honey‐Gated OFETs

open access: yesAdvanced Electronic Materials, EarlyView.
DNTT honey‐gated organic transistors were fabricated and evaluated to assess short‐ and long‐term stability under electrical stress and aging. Short‐term transfer measurements (five days, 40 sweeps/day) showed minimal parameter shift, while extended measurements revealed gradual degradation over weeks.
Douglas H. Vieira   +8 more
wiley   +1 more source

On the relation between rf noise and subthreshold swing in InP HEMTs for cryogenic LNAs [PDF]

open access: yes, 2022
4 - 8 GHz low-noise amplifiers (LNAs) based on InP high electron mobility transistors (InP HEMTs) with different spacer thickness in the InAlAs-InGaAs heterostructure were fabricated and characterized at 5 K.
Li, Junjie   +4 more
core  

Improving electrical performance and bias stability of HfInZnO-TFT with optimizing the channel thickness

open access: yesAIP Advances, 2013
RF magnetron sputtered HfInZnO film and atomic layer deposition (ALD) Al2O3 film were employed for thin film transistors (TFTs) as channel layer and gate insulator, respectively.
Jun Li   +5 more
doaj   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

open access: yesAdvanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez   +10 more
wiley   +1 more source

Atomic threshold-switching enabled MoS2 transistors towards ultralow-power electronics

open access: yesNature Communications, 2020
Here, the authors demonstrate an atomic threshold-switching field-effect transistor constructed by integrating a metal filamentary switch with a two-dimensional MoS2 channel, and obtain abrupt steepness in the turn-on characteristics and 4.5 mV/dec ...
Qilin Hua   +13 more
doaj   +1 more source

Two-dimensional(2D) subthreshold current and subthreshold swing modeling of double-material-gate(DMG) strained-Si(s-Si) on silicon-germanium(SiGe) MOSFETs. [PDF]

open access: yes, 2014
In this dissertation analysis of double-material-gate (DMG) strained-Si (s-Si) channel on SiGe substrate MOSFET is done in the subthreshold region of operation and hence the behaviour of leakage current and subthreshold swing is studied.
Mukhopadhyay , A K
core  

A New Line Tunneling SiGe/Si iTFET with Control Gates for Leakage Suppression and Subthreshold Swing Improvement

open access: yes, 2023
This thesis proposes a new line tunneling dominating metal-semiconductor contact-induced SiGe tunnel field-effect transistor with controlled gates(CG-Line iTFET), as well as a line tunneling dominating metal-semiconductor contact-induced SiGe/Si tunnel ...
Weng, Shao-Cheng
core  

On device architectures, subthreshold swing, and power consumption of the piezoelectric field-effect transistor (π-FET) [PDF]

open access: yes, 2015
This paper describes the potential of tunable strain in field-effect transistors to boost performance of digital logic. Voltage-controlled strain can be imposed on a semiconductor body by the integration of a piezoelectric material improving transistor ...
Kaleli, Buket   +8 more
core   +1 more source

Home - About - Disclaimer - Privacy