Impact of drain and source engineering on dual metal InAs-GaSb VTFETs with high-K gate stack design. [PDF]
Saravanan M +3 more
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Steep-Slope CuInP<sub>2</sub>S<sub>6</sub> Ferroionic Threshold Switching Field-Effect Transistor for Implementation of Artificial Spiking Neuron. [PDF]
Baek S +6 more
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Demonstration of TFTs 3D monolithically integrated on GaN HEMTs using cascode configuration with high breakdown voltage (> 1900 V). [PDF]
Wu TL +5 more
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Modeling and simulation of ZnO-based TFTs by dielectric engineering and temperature analysis for enhanced performance. [PDF]
Kumar P, Askari SSA, Das MK.
europepmc +1 more source
High-κ samarium oxysulfate dielectric for two-dimensional electronics with enhanced gate coupling. [PDF]
Yuan J +6 more
europepmc +1 more source
Energy-efficient neuromorphic system using novel tunnel FET based LIF neuron design for adaptable threshold logic and image analysis applications. [PDF]
Bashir F +3 more
europepmc +1 more source
Gallium nitride multichannel devices with latch-induced sub-60-mV-per-decade subthreshold slopes for radiofrequency applications. [PDF]
Kumar AS +7 more
europepmc +1 more source
High drain field impact ionization transistors as ideal switches. [PDF]
Yuan B +25 more
europepmc +1 more source
A clean van der Waals interface between the high-<i>k</i> dielectric zirconium oxide and two-dimensional molybdenum disulfide. [PDF]
Yan H +10 more
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High-κ dielectric van der Waals integration on 2D semiconductors for three-dimensional complementary logic systems. [PDF]
Kang T +6 more
europepmc +1 more source

