Results 21 to 30 of about 13,751 (195)

Design Guidelines for Gate-Normal Hetero-Gate-Dielectric (GHG) Tunnel Field-Effect Transistors (TFETs)

IEEE Access, 2020
A gate-normal hetero-gate-dielectric (GHG) tunnel field-effect transistor (TFET) and the guidelines for its design are proposed. The introduction of the HG structure into gate-normal TFETs improves device performance by lowering subthreshold swing (SS ...
Jang Woo Lee, Woo Young Choi
doaj   +1 more source

High-Performance Air-Stable Polymer Monolayer Transistors for Monolithic 3D CMOS logics. [PDF]

Adv Mater
A fibrillar polymer monolayer with a self‐confinement effect is demonstrated, in which aligned chains parallel the nanofiber axis. Employing a top‐gate CYTOP dielectric, this monolayer transistor achieves high mobility (7.12 cm2 V−1 s−1) and exceptional stability over 1260 days in air.
Cheng M, Zhang Y, Wang J, Wang H, Xie Y, Zhang S, Liu C, Chu J, Zhang F, Yang Z, Zheng Z, Wu M, Li L, Li M.   +13 more
europepmc   +2 more sources

Analytical Model of Subthreshold Swing for Junctionless Double Gate MOSFET Using Ferroelectric Negative Capacitance Effect

International Islamic University Malaysia Engineering Journal, 2023
An analytical Subthreshold Swing (SS) model is presented to observe the change in the SS when a stacked SiO2-metal-ferroelectric structure is used as the oxide film of a JunctionLess Double Gate (JLDG) MOSFET.
Hakkee Jung
semanticscholar   +1 more source

Ferroelectric HfZrO_x FETs on SOI Substrate With Reverse-DIBL (Drain-Induced Barrier Lowering) and NDR (Negative Differential Resistance)

IEEE Journal of the Electron Devices Society, 2018
Ferroelectric-Hf1-xZrxO2 FETs on silicon on insulator (SOI) are modeled and demonstrated with improvement on subthreshold swing (SS) and hysteresis (VT-shift), which is based on the capacitance matching concept.
Kuan-Ting Chen, Siang-Sheng Gu, Zheng-Ying Wang, Chun-Yu Liao, Yu-Chen Chou, Ruo-Chun Hong, Shih-Yao Chen, Hong-Yu Chen, Gao-Yu Siang, Chieh Lo, Pin-Guang Chen, M.-H. Liao, Kai-Shin Li, Shu-Tong Chang, Min-Hung Lee   +14 more
doaj   +1 more source

Analytical model of subthreshold swing in junctionless gate-all-around (GAA) FET with ferroelectric

AIMS Electronics and Electrical Engineering, 2023
An analytical SS model is presented to observe the subthreshold swing (SS) of a junctionless gate-all-around (GAA) FET with ferroelectric in this paper.
Hakkee Jung
semanticscholar   +1 more source

Inductive line tunneling FET using epitaxial tunnel layer with Ge-source and charge enhancement insulation

Discover Nano, 2023
In this paper, we propose an inductive line tunneling FET using Epitaxial Tunnel Layer with Ge-Source and Charge Enhancement Insulation (CEI ETL GS-iTFET).
Jyi-Tsong Lin, Yen-Chen Chang
doaj   +1 more source

Impact of randomly distributed dopants on Ω-gate junctionless silicon nanowire transistors [PDF]

, 2018
This paper presents experimental and simulation analysis of an Ω-shaped silicon junctionless nanowire field-effect transistor (JL-NWT) with gate lengths of 150 nm and diameter of the Si channel of 8 nm.
Asenov, Asen, Carrillo-Nuñez, Hamilton, Georgiev, Vihar P., MacLaren, Donald A., Mirza, Muhamad M., Paul, Douglas J.   +5 more
core   +1 more source

GaN Nanotube FET With Embedded Gate for High Performance, Low Power Applications

IEEE Journal of the Electron Devices Society, 2020
On the road of CMOS device continuously scaling, there are lots of challenges regarding the device structure and material engineering. GaN channel has recently been used in MOSFETs and achieved excellent performance.
Ke Han, Jiawei Li, Zhongliang Deng, Yannan Zhang, Shanglin Long   +4 more
doaj   +1 more source

Enhancement-Mode Gate-Recess-Free GaN-Based p-Channel Heterojunction Field-Effect Transistor With Ultra-Low Subthreshold Swing

IEEE Electron Device Letters, 2021
We report enhancement-mode ${p}$ -channel heterojunction field-effect transistors (HFETs) without gate recess on a standard ${p}$ -GaN/AlGaN/GaN high electron mobility transistor (HEMT) platform.
Chen Yang, H. Fu, Prudhvi Peri, K. Fu, Tsung-han Yang, Jingan Zhou, Jossue A. Montes, David J. Smith, Yuji Zhao   +8 more
semanticscholar   +1 more source

Improvement of Tunnel Field Effect Transistor Performance Using Auxiliary Gate and Retrograde Doping in the Channel [PDF]

Journal of Electrical and Computer Engineering Innovations, 2018
Background and Objectives: In this work, a dual workfunction gate-source pocket-retrograde doping-tunnel field effect transistor (DWG SP RD-TFET) is proposed and investigated.Methods: The dual workfunction gate-source pocket-retrograde doping-tunnel ...
M. Karbalaei, D. Dideban, N. Moezi
doaj   +1 more source