Results 41 to 50 of about 1,273 (146)
Transistor scaling has become increasingly difficult in the dynamic random access memory (DRAM). However, vertical devices will be good candidates for 4F2 DRAM cell transistors (F = pitch/2).
Zhuo Chen +14 more
doaj +1 more source
Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song +10 more
wiley +1 more source
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez +12 more
wiley +1 more source
Subthreshold-swing physics of tunnel field-effect transistors
Band-to-band tunnel field-effect-transistors (TFETs) are considered a possible replacement for the conventional metal-oxide-semiconductor field-effect transistors due to their ability to achieve subthreshold swing (SS) below 60 mV/decade.
Wei Cao +4 more
doaj +1 more source
The Effect of Fin Structure in 5 nm FinFET Technology
In 5 nm technology node, FinFET device performance is sensitive to the dimension of the device structure such as the fin profile. In this work, we simulate the influence of fin height and fin width to an n-type FinFET. We have found that an optimized fin
Enming Shang +4 more
doaj +1 more source
Aging and Electrical Stability of DNTT Honey‐Gated OFETs
DNTT honey‐gated organic transistors were fabricated and evaluated to assess short‐ and long‐term stability under electrical stress and aging. Short‐term transfer measurements (five days, 40 sweeps/day) showed minimal parameter shift, while extended measurements revealed gradual degradation over weeks.
Douglas H. Vieira +8 more
wiley +1 more source
MgZnO-Based Negative Capacitance Transparent Thin-Film Transistor Built on Glass
We demonstrate the first wide bandgap oxide based negative capacitance transparent thin-film transistor (NC-TTFT) built on glass. The Mg0.03Zn0.97O (MZO) semiconductor served as the channel layer and ferroelectric Ni0.02Mg0.15Zn0.83O (NMZO) serves in the
Fangzhou Yu +5 more
doaj +1 more source
Physics‐Based Compact Modeling of Advanced 3D Nanoscale Vertical NAND Flash Memory
For advanced 3D NAND flash memory, a unified compact model for SPICE is proposed that spans from the intrinsic unit cell to the full string and captures the electrostatic coupling with adjacent inhibit strings. It can successfully predict read behavior, program/erase dynamics, and interactions between neighboring cells, reflecting array‐level behavior ...
Ilho Myeong, Seonho Shin, Ickhyun Song
wiley +1 more source
Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
FS-iTFET: advancing tunnel FET technology with Schottky-inductive source and GAA design
In this paper, we introduce a novel Forkshape nanosheet Inductive Tunnel Field-Effect Transistor (FS-iTFET) featuring a Gate-All-Around structure and a full-line tunneling heterojunction channel.
Jyi-Tsong Lin, Wei-Heng Tai
doaj +1 more source

