Results 211 to 220 of about 2,393 (257)
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A 8-bit 300MHz Domino Based Successive Approximation Register ADC

2022 19th International SoC Design Conference (ISOCC), 2022
Ko-Chi Kuo, Hsiung-Yu Chi
openaire   +1 more source

A 10-bit 100 MS/s Successive Approximation Register Analog-To-Digital Converter Design

IEICE Transactions on Electronics, 2014
Wen Cheng Lai, Jhin-Fang Huang
exaly  

Two CMOS time to digital converters using successive approximation register logic

IEICE Electronics Express, 2018
Changzhi Yu   +2 more
exaly  

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