Results 41 to 50 of about 6,570 (171)
A True 1V 1µW Biomedical Front End with Reconfigurable ADC for Self powered Smarter IoT Healthcare Systems [PDF]
, 2015 This work proposes an ultralow power highly linear analog front-end (AFE) with an input dynamic range from 200μVpp to 20mVpp. The system consists of a signal conditioning instrumentation amplifier (IA), two programmable gain amplifiers (PGA), a mixed ...
Dutta, Asudeb +3 more
core +2 more sources
An expandable 36‐channel neural recording ASIC with modular digital pixel design technique
Electronics Letters, 2023 This paper presents the design and implementation of an expandable neural recording ASIC for multiple‐channel neural recording applications. The ASIC consists of 36 modular digital pixels (MDPs) and a global digital controller (GDC) circuit. Each MDP has
Quan Wang +8 more
doaj +1 more source
Analysis and Design of Noise-Shaping SAR ADC with Capacitor Stacking and Buffering
ChipsThe noise-shaping (NS) successive-approximation-register (SAR) is a promising analog-to-digital converter (ADC) architecture which combines the benefits of SAR and Delta-Sigma (ΔΣ) ADCs.
Zhaoyang Shen, Shiheng Yang, Jiaxin Liu
doaj +1 more source
Electronics Letters, 2019 A resolution‐reconfigurable, bandwidth‐scalable analogue‐to‐digital converter (ADC) with programmable‐gain (PG) functionality for a multi‐sensor system, which encompasses various signals such as bio‐signals and battery‐level, is presented.
J. Rhee, S. Kim
doaj +1 more source
A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS
IEEE Access, 2021 This paper presents a 12-bit 100-MS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) for low-power wireless and imaging systems.
Manxin Li +7 more
doaj +1 more source
Investigasi terhadap Kemampuan 2 Tipe ADC [PDF]
, 2009 Telah dibuat simulasi dan rangkaian untuk ADC (Analog to Digital Converter) tipe Flash dan SAR (Successive Approximation Register) 3 Bit. Simulasi dijalankan dengan memakai program Multisim dan Livewire.
Adnan, Y. (Yulinar) +1 more
core
Free Speech and Its Relation to Self-Government by Alexander Meiklejohn [PDF]
, 1949 In today’s system-on-chip (SoC) implementations, power consumption is a key performance specification. The proliferation of mobile communication devices and distributed wireless sensor networks has necessitated the development of power-efficient analog ...
Fraenkel, Osmond K.
core +2 more sources
, 2017 The readout electronics upgrade for the ATLAS Liquid Argon Calorimeters at the CERN Large Hadron Collider requires a radiation-hard ADC. The design of a radiation-hard dual-channel 12-bit 40 MS/s pipeline ADC for this use is presented.
Andeen, Timothy +7 more
core +1 more source
A very compact 1MS/s Nyquist-rate A/D-converter with 12 effective bits [PDF]
, 2012 We present a very compact analog-to-digital convertor (ADC) for use as a standard cell. To achieve an inherent accuracy of at least 12-bits without trimming or calibration, extended counting A/D-conversion is used. Here, the circuit performs a conversion
De Bock, Maarten +3 more
core +2 more sources
A 12b 50MS/s 2.1mW SAR ADC with redundancy and digital background calibration [PDF]
, 2013 A 12-bit 50MS/s SAR ADC implemented in 65nm CMOS technology is presented. The design employs redundancy to relax the DAC settling requirement and to provide sufficient room for errors such that the static nonlinearity caused by capacitor mismatches can ...
Boning, Duane S. +2 more
core +2 more sources