Results 121 to 130 of about 45,705 (145)

Experiments of a Novel Low-Voltage LDMOS With Ultrashallow Low-Resistance Path Modulated by Bulk Superjunction

IEEE Transactions on Electron Devices
A novel low-voltage LDMOS with ultrashallow low-resistance path (ULP) modulated by the bulk superjunction (SJ) is proposed and experimentally demonstrated in this article.
Sen Zhang, Liang Song, Teng Liu, Huajun Jin, Yongshun Li, Nailong He, Weifeng Sun   +6 more
semanticscholar   +1 more source

Recent developments in superjunction power devices

Journal of Semiconductors
Superjunction (SJ) is one of the most innovative concepts in the field of power semiconductor devices and is often referred to as a "milestone" in power MOS.
Chao Ma, Weizhong Chen, Teng Liu, Wentong Zhang, Bo Zhang   +4 more
semanticscholar   +1 more source

Switching Loss Reduction in Superjunction IGBTs via Analysis of Vertical Charge Imbalance

International Symposium on Power Semiconductor Devices and IC's
This study investigates the switching loss reduction mechanisms in 1.2 kV-class Tapered and protruded pillar Super Junction Insulated Gate Bipolar Transistors (T-SJ IGBTs).
Tomohiro Tamaki, Atsufumi Inoue, S. Hino, Kazuyasu Nishikawa, Makoto Hashimoto, Mitsuhisa Kawase, Yohei Sudo, Tsutomu Ogawa, Tatsuro Watahiki   +8 more
semanticscholar   +1 more source

Theoretical and experimental study on the vertical-variable-doping superjunction MOSFET with optimized process window

Journal of Semiconductors
As a type of charge-balanced power device, the performance of super-junction MOSFETs (SJ-MOS) is significantly influenced by fluctuations in the fabrication process.
Min Ren, Meng Pi, Rongyao Ma, Xin Zhang, Ziyi Zhou, Qingying Lei, Lvqiang Li, Zehong Li, Bo Zhang   +8 more
semanticscholar   +1 more source

Enhanced Theoretical Lower Limit for the Specific On-Resistance of a Silicon Balanced Superjunction

IEEE Transactions on Electron Devices
We propose a simple yet highly effective analytical model for the electric field distribution along the critical path in a balanced superjunction (SJ) power device. Using this electric field model for silicon SJ devices, we relate the breakdown voltage (
Member Ieee Vijaya Kumar Gurugubelli, P. N. S. Bhargav, Vijay Kumar   +2 more
semanticscholar   +1 more source

Dynamic Charge Imbalance in Superjunction IGBTs: Design, Simulation, and Experimental Validation

International Symposium on Power Semiconductor Devices and IC's
To explore the potential of silicon Insulated Gate Bipolar Transistors (IGBTs), we conducted the design, simulation, and experimental validation of the 1.2 kV-class Superjunction (SJ) IGBTs for the first time.
Tomohiro Tamaki, Atsufumi Inoue, M. Furuhashi, S. Hino, Makoto Hashimoto, Mitsuhisa Kawase, Yohei Sudo, Tsutomu Ogawa, Kazuyasu Nishikawa   +8 more
semanticscholar   +1 more source

The Effect of the Pillar Ripple on the Reverse Recovery in Superjunction MOSFETs

Power Electronic Devices and Components, 2022
H Kang, N Donato, F Udrea
exaly  

Gate Ringing in Superjunction MOSFETs with a Parasitic Capacitance in the Load Inductor

Power Electronic Devices and Components, 2023
H Kang, F Udrea
exaly  

High-performance SiC superjunction MOSFET with integrated high-k MOS channel diode for optimized switching characteristics and high-temperature robustness

Journal of Power Electronics (JPE)
Chengxi Ding, Yun-duo Guo, Qimin Huang, Wei Huang, Hongping Ma, Q. Zhang   +5 more
semanticscholar   +1 more source

Superjunction Power Devices, History, Development, and Future Prospects

IEEE Transactions on Electron Devices, 2017
F Udrea, Gerald Deboy
exaly